Director of Analog and Mixed-Signal IC Design
NeurophosJob Title
Director of Analog and Mixed-Signal IC Design
Role Summary
Lead and scale the analog, mixed-signal, and mmWave IC design organization responsible for the electronic interfaces to an optical processing unit (OPU). Deliver silicon from architecture through volume production and coordinate closely with photonics, digital, packaging, systems, and firmware teams.
Hands-on technical leadership role focused on team building, setting technical direction, ensuring first-pass silicon success, and meeting performance, power, schedule, and yield targets.
Experience Level
Senior - typically requires 15+ years of analog/mixed-signal/RF IC design experience, including 5+ years leading design teams.
Responsibilities
Accountable for architecture, execution, and delivery of analog and mixed-signal silicon and for building and managing the design organization.
- Recruit, mentor, and manage analog, mixed-signal, RF/mmWave, and layout engineers; define team processes and culture.
- Define architecture and specifications for ADCs, DACs, drivers, TIAs, PLLs, clocking, regulators, SerDes, and high-speed I/O.
- Own the silicon lifecycle: specification, schematic and layout, verification, tape-out, silicon bring-up, characterization, qualification, and production release.
- Guide low-power precision analog and high-speed mixed-signal design to meet aggressive energy-per-operation targets.
- Lead millimeter-wave circuit development and EM/package co-design with photonics and packaging teams.
- Drive design-for-manufacturability and design-for-test; define trimming, calibration, and production test strategies with test engineering.
- Lead silicon debug, root-cause analysis, yield improvement, and coordination with foundry and OSAT partners.
Requirements
Must-have technical skills and demonstrated product delivery experience; preferred items listed below.
- 15+ years in analog, mixed-signal, and/or RF IC design with proven track record of bringing products from concept through tape-out and into high-volume production.
- Hands-on expertise in data converters, PLLs, high-speed transceivers, amplifiers, and low-power precision analog blocks.
- Experience with millimeter-wave/high-frequency RF circuit design and associated EM simulation, modeling, and measurement techniques.
- Strong working knowledge of advanced CMOS, FinFET, and/or SiGe BiCMOS process technologies and their reliability implications.
- Proficiency with Cadence Virtuoso, Spectre, and EM tools (e.g., EMX) and standard design/verification flows.
- Experience working with foundries and OSATs; familiarity with DFT, ATE test development, trimming, calibration, and failure analysis.
- Structured, organized approach to running a design flow and adapting to changing tools and priorities.
- Nice-to-have: experience with electronics for integrated photonics or optical interconnects, high-speed SerDes (e.g., PAM4), ultra-low-power circuit techniques, advanced packaging and signal/power integrity, startup team building, and a record of patents or publications.
Education Requirements
Preferred: PhD in Electrical Engineering, Computer Engineering, Physics, or a related field. No other specific degree (Bachelor's/Master's) or explicit "equivalent experience" language was stated in the posting.
About the Company
Company: Neurophos
Headquarters: Sunnyvale, California, United States
Startup developing silicon-photonic AI accelerator chips that use programmable metasurfaces and dense optical cells to perform matrix multiplications at the speed of light, targeting large-scale AI inference with much higher energy efficiency and performance than traditional electronic approaches.
