Job Title
Director, AI/ML Driven ASIC Design and Implementation Automation
Role Summary
Lead research and engineering efforts to apply AI/ML techniques to ASIC/VLSI design automation, improving power, performance, area, and quality for SoC and IP teams. You will develop prototypes, evaluate state-of-the-art methods, and pilot automation on real designs within the AI & Chip Engineering (ACE) organization.
Work cross-functionally with architecture, IP, SoC design and implementation teams and with external academic and industry AI/ML experts to translate research into production-capable CAD tools and flows.
Experience Level
Senior β typically requires 7+ years of relevant experience in AI/ML and software/CAD development.
Responsibilities
Drive AI/ML research and automation applied to VLSI design and implementation; deliver prototypes and pilots that improve design metrics.
- Explore and evaluate AI/ML approaches (GenAI, reinforcement learning, graph neural networks, CNNs) for VLSI CAD problems.
- Develop prototype solutions and run pilots on actual SoC/IP designs to validate benefits.
- Collaborate with academic researchers and internal architecture, IP, and implementation teams to define methods and tool requirements.
- Integrate AI-driven techniques into workflows to improve power, performance, area, timing closure, and overall quality.
- Coordinate cross-site initiatives and lead engineering efforts for digital transformation in design methodology and automation.
Requirements
Core technical skills and experience required for the role. "Must-have" items are listed first; "Nice-to-have" items follow.
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Must-have: Strong AI/ML expertise with hands-on experience applying LLMs, CNNs, RNNs, and GraphNNs to practical optimization problems.
- Proven software development experience in Python and C++ and familiarity with data structures and algorithms for optimization.
- Experience with Unix/Linux environments, version control (Git, BitBucket), and standard software development and debug tools.
- Demonstrated analytical problem-solving and strong verbal/written communication skills.
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Nice-to-have: Prior VLSI CAD methodology or tool development experience; knowledge of static timing analysis, low-power flows (UPF), constraints (SDC, CDC), and power-aware implementation.
- Familiarity with HDL (SystemVerilog/Verilog/VHDL), front-end design, physical design and layout-generation flows, and common EDA tools for verification and implementation.
- Experience with CI/CD tools and platforms (Splunk, Jenkins, LSF) and design revision control (DesignSync, Git) and build systems (Make).
Education Requirements
BS or MS in Computer Science, Electrical Engineering, Computer Engineering or a related discipline with a strong software development background (explicitly listed in the posting).
About the Company
Company: NXP Semiconductors
Headquarters: Nijmegen, Netherlands
NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.

Date Posted: 2026-08-20