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Digital Verification Senior Staff Engineer

Synopsys
September 06, 2026
Full-time
On-site
Ho Chi Minh City, Ho Chi Minh, Vietnam
Verification Jobs, Level - Senior

Job Title

Digital Verification Senior Staff Engineer

Role Summary

Senior Staff Engineer in digital verification responsible for defining and delivering verification architecture and sign-off for ASIC/SoC projects within the ASIC Digital Design engineering team. The role leads verification strategy, coordinates with RTL designers and validation teams, and drives debug and closure of complex verification issues.

Experience Level

Senior-level (Senior Staff). Years of experience not specified on the posting.

Responsibilities

Primary responsibilities include technical leadership of verification activities and delivery of production-quality verification environments.

  • Define verification strategy and create verification plans for blocks and subsystems.
  • Design and implement SystemVerilog/UVM verification environments and tests.
  • Lead debug of functional failures across simulation, emulation, and silicon bring-up.
  • Mentor and review work of verification engineers; drive best practices.
  • Collaborate closely with RTL designers, CAD, and validation teams to achieve sign-off.
  • Develop and maintain regression infrastructure and automated test flows.
  • Perform coverage analysis and closure; write assertions and checkers as needed.
  • Document verification results and hand over verified deliverables to downstream teams.

Requirements

Must-have skills and experience followed by desirable additions.

  • Must-have: Extensive experience in digital verification with strong SystemVerilog and UVM skills.
  • Must-have: Proven track record leading verification for complex ASIC/SoC blocks, including planning, execution, and closure.
  • Must-have: Hands-on experience with simulators/emulators and debug tools; strong scripting skills (Python, Tcl, Perl or similar).
  • Must-have: Experience with coverage-driven verification, assertions (SVA), and writing testbenches.
  • Nice-to-have: Experience with formal verification, low-power verification, DFT, or emulation platforms.
  • Nice-to-have: Familiarity with Synopsys verification toolchain (VCS, Verdi) or equivalent vendor tools.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-03