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Digital Verification Apprenticeship

Synopsys
September 21, 2026
Internship
On-site
Hyderabad, Telangana, India
Verification Jobs, Level - Entry or Early Career

Job Title

Digital Verification Apprenticeship

Role Summary

Entry-level apprenticeship on Synopsys verification teams in Hyderabad. The apprentice will build and run verification environments, write testbenches, and work with designers to validate digital blocks and subsystems.

This role provides hands-on experience with industry-standard verification flows and tools in an in-office, full-time 12-month program.

Experience Level

Entry-level (apprenticeship for fresh graduates). Targeted at recent graduates from the class of 2025 or 2026; no prior full-time employment required.

Responsibilities

Primary verification and validation tasks expected during the apprenticeship:

  • Develop and maintain verification environments for digital design blocks and systems.
  • Design and execute testbenches using Verilog and SystemVerilog with UVM methodology.
  • Write and debug SystemVerilog Assertions (SVA) to verify protocol and functional behavior.
  • Run regressions, perform coverage and closure analysis, and document verification results.
  • Analyze simulation results, debug failures, and identify design or verification issues.
  • Collaborate with design and architecture teams to create test plans and functional coverage models.

Requirements

Mandatory technical skills and eligibility constraints for applicants.

  • Strong knowledge of Verilog and SystemVerilog.
  • Familiarity with UVM-based verification methodology and reusable verification components.
  • Solid understanding of digital design and verification flows.
  • Ability to write and debug SystemVerilog Assertions (SVA).
  • Strong analytical, debugging, and problem-solving skills.
  • Not employed in any full-time position; limited internship experience acceptable.
  • Nice-to-have: awareness of MIPI protocols (UniPro, M‑PHY), exposure to simulation tools, regression environments, code coverage and functional coverage analysis.

Education Requirements

Completed B.E. / B.Tech in Electronics and Communication Engineering or a related technical field is mandatory. Targeted at fresh graduates from the class of 2025 or 2026. Applicants must not be currently enrolled in or hold M.Tech/postgraduate diplomas. No explicit equivalent-experience language provided.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-19