Skip to main content
Hewlett Packard Enterprise logo

ASIC Verification Engineer

Hewlett Packard Enterprise
September 21, 2026
Full-time
Remote friendly (Durham, North Carolina, United States)
Worldwide
$105,500 - $243,000 USD yearly
Verification Jobs, Level - Mid-Career

Job Title

ASIC Verification Engineer

Role Summary

Join HPE Networking Silicon as an ASIC Verification Engineer focused on block- and subsystem-level verification for high-speed networking SoCs. The team develops verification environments and test plans to validate complex datapath, control, and interface logic for routers and switches.

This is a hybrid role based in Durham, NC with an expectation of approximately 2 days per week in the office.

Experience Level

Mid-level - requires approximately 4+ years of ASIC/SoC verification experience.

Responsibilities

Primary responsibilities include planning, implementing, and executing verification for ASIC blocks and subsystems.

  • Own block- or subsystem-level verification from test plan through coverage closure.
  • Design, develop, and maintain UVM/SystemVerilog verification environments (agents, sequences, scoreboards, register models, virtual sequences).
  • Create and run constraint-random tests; implement functional coverage and assertions (SVA).
  • Analyze simulation results using industry-standard simulators and debug waveforms to validate functionality.
  • Collaborate with RTL, architecture, and bring-up teams to identify and resolve issues.

Requirements

Must-have technical skills and relevant experience, plus preferred qualifications.

  • Must-have: 4+ years of ASIC/SoC verification experience, proven ownership from test plan to coverage closure.
  • Must-have: Strong SystemVerilog and UVM expertise, including building environments from scratch.
  • Must-have: Deep knowledge of randomization, constraints, functional coverage, and assertion-based verification (SVA).
  • Must-have: Experience with test planning, coverage analysis, and debugging complex SoC designs.
  • Must-have: Hands-on experience with simulation tools (Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.
  • Nice-to-have: Experience verifying networking ASICs (packet processing, forwarding engines, fabric interfaces) or high-speed interconnects.
  • Nice-to-have: Exposure to emulation, hardware acceleration, traffic-model integration, post-silicon bring-up, or formal/low-power methodologies (UPF).
  • Nice-to-have: Familiarity with coverage analytics, regression dashboards, and CI flows (e.g., Jenkins).
  • Additional note: U.S. citizenship preferred for this role.

Education Requirements

Not specified.


About the Company

Company: Hewlett Packard Enterprise

Headquarters: Spring, TX, United States

Global enterprise technology company delivering hybrid cloud, edge-to-cloud platforms, servers, storage, networking, and IT services to help organizations build, run, and secure applications and infrastructure at scale.

Hewlett Packard Enterprise logo

Date Posted: 2026-09-21