Digital Signal Processing and System Validation Engineer
BroadcomJob Title
Digital Signal Processing and System Validation Engineer
Role Summary
Design and validate digital signal processing blocks and system-level behavior for next-generation optical data-center connectivity ASICs. Work across pre-silicon modeling, RTL development, and post-silicon validation to meet performance, power, and cost targets.
Experience Level
Senior — role requires extensive industry experience (see Education Requirements for formal degree/experience combinations).
Responsibilities
Deliver and validate DSP features from algorithm to silicon and collaborate with cross-functional teams.
- Design DSP blocks (equalization, CDR, adaptation) and translate algorithms into synthesizable RTL.
- Develop models and testbenches in Matlab/Simulink and Verilog/SystemVerilog for functional validation.
- Perform pre-silicon verification, SDF-annotated simulation, and static timing/CAD flow support.
- Lead post-silicon validation and debug of mixed-signal IPs and high-speed serial links.
- Collaborate with synthesis, CDC, and DFT teams to ensure testability and timing closure.
- Document validation results and present findings to engineering and management stakeholders.
Requirements
Must-have technical skills and hands-on tool experience.
- Experience with post-silicon validation of digital and analog mixed-signal IPs.
- Deep understanding of ADCs and optical/electrical interconnect architectures, including PAM4 and NRZ trade-offs.
- Experience translating CDR and equalization architectures into Verilog/SystemVerilog for synthesis.
- Proficient in Matlab and Simulink; experienced writing behavioral models and testbenches.
- Familiarity with front-end simulation tools such as NCVerilog, NCSIM, Simvision, and Spyglass.
- Exposure to design-for-test concepts and writing DFT-friendly RTL.
- Experience with synthesis flows, CDC analysis, static timing analysis, and SDF-annotated simulation.
- Strong debugging skills for mixed-signal and high-speed link issues.
Nice-to-have: high-speed DSP algorithms, ADC/FFE/DFE/CDR adaptation experience for PAM4, Verilog-AMS exposure, signal and power integrity modeling, and low-power logic optimization.
Education Requirements
MS in Electrical Engineering or Computer Engineering with 10+ years of relevant experience, or PhD with 7+ years of relevant experience in digital signal processing design for SerDes and high-speed serial links. Fields: Electrical Engineering, Computer Engineering, or closely related technical disciplines. No certifications specified.
About the Company
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.
