Digital Mixed Signal (DMS) Design Verification Engineer

Job Title

Digital Mixed Signal (DMS) Design Verification Engineer

Role Summary

Member of the design verification team responsible for modeling and verifying highly integrated mixed-signal products at block and chip-top levels. Role interfaces with analog, digital, verification, CAD and test teams to enable first-pass silicon and post-silicon validation.

Position is located in Bangalore, working on next-generation edge intelligence products.

Experience Level

Entry-level / Early career — requires approximately 2+ years of industry experience.

Responsibilities

Primary responsibilities include planning and executing verification for mixed-signal products and collaborating across disciplines to achieve first-pass silicon success.

• Define verification strategy from product requirements and design specifications.
• Develop analog/mixed-signal behavioral models for chip-top verification; balance accuracy and simulation speed and validate models with self-checking tests.
• Create verification plans, build verification environments, and develop self-checking testcases for block and chip-top levels.
• Bring up and run mixed-signal chip-top verification environments (DMS DV).
• Apply industry-standard SV/UVM metric-driven verification methodologies.
• Collaborate with system architects, digital/analog design, digital DV, DFT, CAD, and test/characterization teams through pre- and post-silicon phases.
• Contribute to CAD/verification methodology improvements to reduce time-to-market.

Requirements

Must-have technical skills and experience for successful performance in this role.

Must-have:

• Experience in analog/mixed-signal behavioral modeling and using those models for full-chip verification with digital RTL/PA/gates.
• Good understanding of analog design concepts and mixed-signal architectures (integration of PM, ADC/DAC, PLLs, bandgaps, oscillators, SerDes, digital control).
• Hands-on experience developing verification plans, environments, and debugging complex mixed-signal products at block and chip-top levels.
• Knowledge of SV/UVM-based verification (agent creation, environment building, scoreboarding, RAL).
• Experience with digital simulators and verification flows (regression management, coverage tracking, metric-driven verification).
• Proficiency in C and scripting for automation (Python/Perl/Shell).
• Strong communication and collaboration skills across globally distributed teams.

Nice-to-have:

• Experience with SV-RNM.
• Familiarity with Cadence Virtuoso, Simvision, Cadence Xcelium, or Synopsys VCS for mixed-signal/digital debug.
• Experience with metric and regression tools such as Cadence vManager and MDV frameworks.
• Background in CAD/verification methodology development and deployment.
• Any additional tools or languages related to product development.

Education Requirements

B.Tech or M.Tech degree is specified in the posting; the role expects 2+ years of industry experience. No specific field-of-study or equivalent-experience clause is provided in the source.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.