Digital IP Principal Verification Engineer

Job Title

Digital IP Principal Verification Engineer

Role Summary

Lead definition and implementation of functional verification strategy for digital IP or subsystem-level blocks. Author verification plans, UVM-based testbenches, assertions, and simulation infrastructure to ensure IP meets its specification.

The role executes verification campaigns, debugs failures, collects coverage data, and uses formal techniques and AI-augmented tooling to improve productivity.

Experience Level

Senior level. Minimum 6 years of experience in IP or SoC design or verification.

Responsibilities

Primary duties include planning and executing verification for digital IP and related subsystems.

• Define and document IP verification plans from requirements and architecture.
• Develop UVM/SystemVerilog testbenches, drivers, monitors, and directed and random tests.
• Write SystemVerilog Assertions (SVA) and coverage points to match the verification plan.
• Run simulations, collect and analyze code and functional coverage; identify and close coverage holes.
• Perform assertion-based formal verification on blocks and IPs.
• Debug failing tests to locate root cause (tool, testcase, checker, or RTL) and track fixes.
• Maintain verification infrastructure, scripts, and build flows.
• Use AI tools to augment generation of work products and improve verification productivity.

Requirements

Must-have technical skills and experience; items listed as "Nice-to-have" are optional but beneficial.

• Must-have: 6+ years in IP or SoC design or verification experience.
• Must-have: Strong Verilog/SystemVerilog and UVM coding skills.
• Must-have: Proven verification skills: test planning, testcase development, simulation, testbench development, and debug.
• Must-have: Experience with assertion-based formal verification.
• Must-have: Ability to work independently and in small teams with limited supervision.
• Must-have: Proficiency using AI to augment generation of work products.
• Nice-to-have: Programming/scripting (Python, C/C++, Perl, TCL) for automation and utilities.
• Nice-to-have: RTL design experience, synthesis knowledge, static and formal checkers.
• Nice-to-have: Familiarity with ARM AMBA protocols.

Education Requirements

Minimum Bachelor of Science in Electrical Engineering, Computer Engineering, or Computer Science (BSEE/BSCE/BSCS) required. Master's degrees (MSEE/MSCE/MSCS) are a plus.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.