Digital Implementation Engineer

Job Title

Digital Implementation Engineer

Role Summary

Own the physical implementation flow for Snowcap's superconducting digital chips from synthesized netlist to tape-out-ready GDSII. You will build floorplans, placement, CTS, routing, power grid and timing-closure flows on a non-CMOS PDK and work directly with RTL designers, verification, and sign-off engineering in a flat organization.

Experience Level

Mid-level. The posting does not specify exact years; typical candidates will have mid-career implementation experience (commonly ~3–7 years) with production silicon tape-outs.

Responsibilities

Primary responsibilities include owning and operationalizing the full digital implementation flow and ensuring clean tape-out-ready databases and sign-off inputs.

• Own implementation from synthesis through floorplan, placement, clock tree synthesis, routing, and tape-out-ready GDSII.
• Drive timing closure (setup, hold, multi-corner multi-mode) and diagnose root causes beyond report locations.
• Design and verify power grid and perform IR-drop analysis appropriate to superconducting current distribution.
• Manage DRC/LVS physical verification and work with sign-off engineering on extraction and parasitics for final sign-off.
• Develop and maintain the implementation automation and methodology: TCL/Python scripts, recipes, and production flow automation.
• Establish implementation methodology and quality-of-results standards for the team.

Requirements

Concise list of required skills and the strongest differentiators.

Must-have

• Proven track record of taking digital blocks from synthesized netlist to taped-out GDSII on production silicon.
• Production-level experience with ICC2, Cadence Innovus, or equivalent place-and-route platforms.
• Strong timing-closure skills: large-scale setup/hold debug and multi-corner multi-mode analysis; ability to choose between RTL, floorplan, or CTS fixes.
• Practical knowledge of power-grid design and IR-drop analysis and how implementation choices affect sign-off outcomes.
• Fluency in scripting (TCL and Python) for flow automation, recipe management, and tool customization.
• Comfort working in custom or semi-custom flows rather than relying solely on standard-cell autopilot scripts.

Nice-to-have

• Experience with non-CMOS PDKs (e.g., NbTiN, NbN) or superconducting logic implementations.
• Background from major silicon teams (NVIDIA, Intel, Qualcomm, IBM) with shipped silicon in senior/principal bands.
• Experience standing up an implementation flow from first script/first floorplan to production.
• Familiarity with STA corners, extraction, EM/IR, DFT tradeoffs, mixed-signal or custom-block integration, or authored automation/methodology adopted by other teams.

Education Requirements

Not specified.

About the Company

Company: Snowcap Compute

Headquarters: San Francisco, CA, United States

Snowcap Compute develops commercial superconducting digital computers using Josephson junction–based PCL logic that operate at cryogenic temperatures, aiming for dramatically lower power than CMOS. The company combines expertise in quantum physics, cryogenic engineering, and semiconductor manufacturing to build production superconducting chips.