Digital IC Design Engineer Intern
NeuralinkJob Title
Digital IC Design Engineer Intern
Role Summary
The intern will contribute to micro-architecture design, RTL implementation, and verification for low-power digital subsystems within a brain–computer interface SoC team. The role works on a small, cross-functional team of chip, electrical, algorithms, and software engineers.
Primary mission: improve energy efficiency, scalability, and performance of next-generation neural-interface silicon through architecture and RTL design.
Experience Level
Internship / Entry-level. The posting requests approximately 2+ years of digital design experience.
Responsibilities
Primary responsibilities include:
- Micro-architecture design and RTL implementation for low-power digital signal processors, general-purpose accelerators, graphics processors, radio MAC/PHY, and serial link MAC/PHY.
- Design and implement hardware/software interfaces in collaboration with firmware engineers.
- Application-specific architecture optimization: system modeling for energy and performance, workload analysis, and technology-aware trade-offs including process variation effects.
- Complex SoC verification: behavioral-level modeling and equivalence checks, FPGA emulation, analog mixed-signal co-simulation, and design-for-testability.
- Collaborate on silicon bring-up and validation with silicon validation engineers.
Requirements
Must-have skills and experience:
- At least 2 years of experience in digital design.
- Proficiency in SystemVerilog, C/C++, and Python.
- Experience spanning architecture, microarchitecture, and RTL using industry-standard EDA tools.
- Experience designing digital signal processing pipelines from algorithm to RTL.
Nice-to-have:
- Verification experience with SystemVerilog, SystemC/C++, or UVM and experience automating tool flows.
- Physical design experience for complex digital systems and familiarity with silicon bring-up and debugging.
- Embedded design, processor ISA design, compiler back-end experience, PCB design, or firmware development.
- Experience optimizing architectures with process-technology customization.
Compensation (stated): California hourly flat rate $35/hr USD.
Education Requirements
The posting references demonstrated/exceptional ability in electrical engineering, computer science, or computer engineering. No specific degree title (Bachelor's, Master's, or PhD) was explicitly required; the emphasis is on demonstrated ability in those technical fields.
About the Company
Company: Neuralink
Headquarters: Fremont, California, United States
Neuralink is a technology company developing devices for a bidirectional interface with the brain, aiming to restore movement to paralyzed individuals and revolutionize human interaction with the digital world. The company focuses on advanced chip architecture and silicon implementation for high-bandwidth brain-computer interfaces, fostering a collaborative environment for engineers dedicated to pushing the boundaries of innovation.
