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Digital IC Design Engineer

Neuralink
July 29, 2026
Full-time
On-site
Acalanes Ridge, California, United States
$116,000 - $233,800 USD yearly
RTL Design Jobs, Level - Mid-Career

Job Title

Digital IC Design Engineer

Role Summary

Design and implement micro-architecture and RTL for low-power, high-throughput digital IP and systems targeted at brain-computer interface SoCs. Work on DSPs, hardware accelerators, on-chip interfaces, and related subsystems within a silicon design team focused on neural recording and stimulation.

Collaborate with verification, firmware, and bring-up engineers to optimize architecture for energy, performance, and manufacturability.

Experience Level

Mid-level β€” typically requires 5+ years of digital IC design experience as stated in the posting.

Responsibilities

Primary responsibilities include architecture, RTL implementation, and system-level optimization.

  • Micro-architecture design and RTL implementation for low-power DSPs, hardware accelerators, GPUs, and serial/communication MAC/PHY.
  • Design and optimize hardware/firmware interfaces in collaboration with firmware engineers.
  • Model systems for energy and performance, perform workload analysis, and run energy/performance profiling.
  • Make architecture-level trade-offs considering process technology, workload, cost, and variation.
  • Support silicon bring-up and collaborate with verification and test engineers during integration and debug.

Requirements

Must-have technical skills and experience; preferred items noted separately.

  • Must-have: 5+ years of digital design experience; proven ability delivering complex digital systems from architecture through RTL.
  • Expertise in SystemVerilog and experience with industry-standard digital design tools.
  • Proficiency in C/C++ and Python for modeling, tooling, and firmware interface work.
  • Experience designing digital signal processing pipelines and taking algorithms to RTL.
  • Evidence of strong technical ability in electrical/computer engineering or related disciplines (education summarized below).
  • Nice-to-have: architecture optimization with process customization, verification and physical-design experience, SoC bring-up and test, SystemC/C++ modeling, flow automation, embedded design, ISA or compiler back-end experience.

Education Requirements

Bachelor of Science (B.S.) in Electrical Engineering, Computer Science, Computer Engineering, or a related technical field, or equivalent practical experience. The posting also references evidence of exceptional ability in electrical engineering, computer science, or computer engineering.


About the Company

Company: Neuralink

Headquarters: Fremont, California, United States

Neuralink is a technology company developing devices for a bidirectional interface with the brain, aiming to restore movement to paralyzed individuals and revolutionize human interaction with the digital world. The company focuses on advanced chip architecture and silicon implementation for high-bandwidth brain-computer interfaces, fostering a collaborative environment for engineers dedicated to pushing the boundaries of innovation.

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Date Posted: 2026-07-22