Digital Design Lead / Manager

Job Title

Digital Design Lead / Manager

Role Summary

Lead and grow the digital engineering team responsible for mixed-signal SoC development, collaborating with Analog/RF, firmware, verification, system validation, operations, and SOC architects. Deliver digital architecture, RTL, verification, and integration for next-generation RF/communication SoCs.

This role combines hands-on RTL and verification leadership with people management and cross-functional program ownership through silicon bring-up and production testing.

Experience Level

Senior — requires extensive technical and management experience; source specifies 10+ years in RTL design and verification and at least 3+ years leading low-power mixed-signal SoC design.

Responsibilities

Own digital design and delivery for mixed-signal SoCs and lead the digital team from architecture through production hand-off.

• Manage, hire, and retain a team of digital design engineers; mentor and provide technical leadership.
• Lead SoC integration and digital implementation for RF/communication mixed-signal products.
• Define product specs, system architecture, HW/SW partitioning, and execution plans with cross-functional teams.
• Develop and refine micro-architecture and implement RTL for state machines, interfaces, and full-chip integration.
• Establish SoC development practices and improve methodology for predictability and efficiency.
• Coordinate verification strategy (UVM, directed/constrained-random), simulation, FPGA emulation, and lab/chip validation.
• Support silicon bring-up, system validation, production test readiness, and resolve timing and signal-integrity issues with PD/SI teams.
• Evaluate and integrate third-party IP (PCIe, LPDDR, JESD, etc.) and develop necessary BIST or test infrastructure.

Requirements

Must-have technical skills and experience are listed first; nice-to-have items follow.

• Must-have: 10+ years RTL design and verification experience; proven track record in high-performance/high-volume semiconductor projects.
• Must-have: At least 3 years leading low-power mixed-signal SoC digital design and integration.
• Must-have: Strong RTL expertise in Verilog/SystemVerilog, UVM, and experience with simulation, synthesis, power and timing analysis in Cadence/Synopsys flows.
• Must-have: FPGA architecture and implementation experience (Altera/Intel or Xilinx) for high-speed serial protocols and FPGA emulation for validation.
• Must-have: Experience specifying and working with Analog/RF teams on SERDES, CDR, PLL/DLL, and mixed-signal integration.
• Must-have: Design-for-test (DFT), low-power and high-speed digital IC design experience; strong SoC architecture and system-level understanding.
• Must-have: Proficiency in C/C++/SystemC and scripting (Perl/Python) and strong technical documentation and communication skills.
• Nice-to-have: Experience with USB 3.x, PCIe, SATA, DisplayPort, JESD204, LPDDR; startup experience and senior management background preferred.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) required; Master of Science in Electrical Engineering (MSEE) preferred. Equivalent practical experience in relevant semiconductor/SoC roles is acceptable.

About the Company

Company: Omni Design Technologies

Headquarters: Hyderabad, India

Omni Design Technologies specializes in the development of advanced solutions for electronic design automation, focusing on ASIC and FPGA verification processes. The company provides high-quality verification tools and resources for engineers in the semiconductor industry, ensuring efficient design and reliable performance.