Digital ASIC Design Automation Engineer
EliyanJob Title
Digital ASIC Design Automation Engineer
Role Summary
Work on Eliyan's NuLink chiplet interconnect technology to automate and improve digital design workflows. The role owns the Jenkins-based design flow infrastructure and builds automation and AI-driven tooling to reduce manual lint, CDC, and synthesis work.
Experience Level
Mid-level. The posting does not specify a required number of years of experience.
Responsibilities
Key responsibilities include:
- Own and maintain the Jenkins-based RTL design flow infrastructure end-to-end.
- Design and implement automation for linting, CDC checks, and synthesis flows.
- Develop AI-driven solutions and agent-driven triage to reduce irrelevant design violations.
- Create automated pull requests and other tools to simplify designer reviews and remediation.
- Collaborate with a small engineering team to rapidly deploy tooling improvements.
Requirements
Core requirements and desirable skills:
- Must-have: Experience in digital design and automation processes.
- Must-have: Familiarity with CI/CD practices for RTL design and experience managing Jenkins or similar CI systems.
- Must-have: Practical knowledge of lint, CDC, and synthesis automation.
- Must-have: Strong problem-solving skills and ability to work collaboratively in a fast-paced small-team environment.
- Nice-to-have: Experience applying AI/ML tools to design automation tasks.
- Nice-to-have: Experience creating automated pull requests, agent-driven triage, or other developer-facing automation.
Education Requirements
Not specified.
About the Company
Company: Eliyan
Headquarters: San Francisco, CA, USA
Early-stage chiplet startup developing technologies for chiplet-based systems, focused on delivering best-in-class power, area, manufacturability, and design flexibility. Works on DFT, IP, and test methodologies to enable high-volume, high-performance semiconductor products.
