DFT Staff Engineer

Job Title

DFT Staff Engineer

Role Summary

Hands-on DFT lead responsible for DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout. This is a customer-facing role within the Systems Solutions Group, working closely with internal design teams and customers to enable successful silicon bring-up and production test.

Experience Level

Senior-level. Typically requires 5+ years of hands-on SoC DFT experience.

Responsibilities

Own technical deliverables end-to-end and collaborate across design and test organizations to ensure testability and production-ready test programs.

• Define and implement DFT architecture and test strategies across scan/ATPG, memory BIST, logic BIST, and analog/PHY test considerations.
• Integrate DFT into RTL-to-GDS flow and drive DFT signoff readiness by identifying and closing testability risks early.
• Develop reusable DFT methodologies, checklists, and guidelines to be used across projects.
• Work with silicon validation and test engineering teams on post-silicon debug, failure analysis, and pattern refinement.
• Collaborate with RTL design, functional verification, physical design, timing, and power teams to ensure testability is designed in.
• Provide technical guidance through design reviews, integration/debug support, and best-practice sharing.

Requirements

Key technical and professional requirements. Must-have items listed first; nice-to-have items listed after.

• Must-have: 5+ years of hands-on SoC DFT experience with proven depth in scan/ATPG, memory BIST, and logic BIST.
• Must-have: Demonstrated experience owning DFT implementation for complex SoCs that have taped out and gone to production.
• Must-have: Strong understanding of the end-to-end SoC design flow from microarchitecture through RTL, verification, synthesis, timing/physical implementation, and signoff.
• Must-have: Proven ability to work cross-functionally to resolve testability issues and drive closure under schedule constraints.
• Nice-to-have: Post-silicon debug experience and collaboration with test engineering teams to refine production test programs.
• Nice-to-have: Working knowledge of Synopsys DFT tools such as TetraMAX, DFT Compiler, and BIST Architect.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or a related field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.