Synopsys logo

DFT Solutions Engineer

Synopsys
June 01, 2026
Full-time
On-site
Bengaluru, Karnataka, India
DFT Jobs, Level - Senior

Job Title

DFT Solutions Engineer

Role Summary

Deliver design-for-test (DFT) solutions for complex digital ICs and SoCs, from architecture planning through pattern generation, silicon bring-up, and diagnostics. Work directly with customers to identify test gaps, implement and validate scan/MBIST/IEEE1687-based test architectures, and support adoption of Synopsys test technologies.

Primary domains include automotive, AI, and consumer electronics; role combines hands-on technical implementation, customer-facing consultancy, and feedback to R&D.

Experience Level

Senior. Requires 7+ years with a Bachelor's degree or 5+ years with a Master's degree in a relevant engineering field (see Education Requirements).

Responsibilities

Key responsibilities include end-to-end DFT delivery, customer engagement, and method development.

  • Design and validate DFT architectures: scan, MBIST, IEEE 1687 and test access networks for multi-IP SoCs.
  • Perform scan insertion, ATPG pattern generation, and silicon bring-up support, including failure diagnosis.
  • Participate in customer design reviews to assess flows, identify test coverage gaps, and recommend improvements.
  • Prototype and validate new DFT methodologies with Solution Architects before customer deployment.
  • Provide technical support, training, and methodology workshops to customer engineering teams.
  • Conduct product demonstrations and competitive evaluations to support sales and adoption.
  • Analyze silicon test data, diagnose failures, and present actionable findings to customers and internal teams.

Requirements

Must-have technical skills and experience.

  • Hands-on experience with RTL coding, DFT insertion, ATPG pattern generation, and silicon bring-up for digital ICs.
  • Deep knowledge of scan architectures, fault models, and test access networks; familiarity with IEEE standards 1149.1, 1500, 1687.
  • Proven ability to implement and validate scan for large, multi-IP SoCs with complex hierarchies and multiple clock domains.
  • Strong written and verbal communication skills for technical and non-technical audiences.
  • (Nice-to-have) Experience with MBIST concepts, architecture planning, and integration in automotive or safety-critical environments.
  • (Nice-to-have) Familiarity with industry-standard DFT tools and exposure to Synopsys TetraMAX, DFT Compiler, or MBIST Architect.

Education Requirements

Bachelor's degree with 7+ years' experience, or Master's degree with 5+ years' experience, in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related technical field.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Synopsys logo

Date Posted: 2026-05-27