DFT Intern

Job Title

DFT Intern

Role Summary

As a DFT Intern you will support development and automation of Design-for-Test (DFT) flows to enable chip-level regression on Etched's Caelius platform. You will work across frontend and backend teams to implement and verify DFT features, run MBIST/scan/BSCAN/SSN simulations, and develop ATPG fault-model flows.

This is a 12-week paid, in-person internship based in San Jose, CA. Interns receive housing support for those relocating, daily lunch and dinner, and direct mentorship from experienced engineers. For questions: internships@etched.com.

Experience Level

Entry-level internship (student-level). Open to candidates seeking Summer '26, Fall '26, Spring '27, or Summer '27 internships.

Responsibilities

Typical responsibilities include:

• Review and refine DFT flow automation and regression for chip-level tests on Caelius.
• Collaborate with frontend and backend design teams to integrate DFT into the design flow.
• Perform DFT verification including MBIST, scan, BSCAN, and SSN simulations.
• Develop and validate flows for various ATPG fault models.
• Write and maintain automation and regression scripts (Python, Tcl, etc.).
• Document results and present findings; receive and act on mentorship feedback.

Requirements

Minimum technical skills and expectations:

• Familiarity with a hardware description language such as Verilog or SystemVerilog.
• Exposure to ASIC or SoC design concepts and digital logic fundamentals.
• Understanding of standard ASIC design flow steps: synthesis, STA, DFT.
• Experience scripting in Python, Tcl, or a similar language for automation.
• Ability to learn quickly and work autonomously in a fast-paced, in-person engineering environment.

Nice-to-have:

• Knowledge of DFT concepts such as MBIST, scan insertion, and scan compression.
• Experience with Tessent or similar DFT tooling.
• Familiarity with ATPG fault models (SAF, TDF, BDF, IDDQ, PDF).
• Exposure to DFT flow automation or regression infrastructure.
• Familiarity with clocking and reset schemes.

Education Requirements

Progress toward a Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.