DFT Engineer – Semiconductor / ASIC / SoC
Philodesign TechnologiesJob Title
DFT Engineer – Semiconductor / ASIC / SoC
Role Summary
Design-for-Test (DFT) engineer responsible for implementing and verifying DFT/DFx features on ASIC/SoC projects. The role requires collaboration with RTL, design, verification, and test teams to improve test coverage and production readiness.
Position is based in the San Francisco Bay Area and requires onsite presence from day one.
Experience Level
Mid-level (5+ years of relevant DFT/DFx experience required).
Responsibilities
Primary responsibilities across the DFT lifecycle:
- Design, implement, and verify DFT/DFx features for ASIC/SoC designs.
- Perform DFT verification and validation, and support ATPG generation and analysis.
- Debug DFT and test-related issues and coordinate resolutions with cross-functional teams.
- Work with IEEE 1687 / IJTAG, ICL, and PDL in test infrastructures and flows.
- Analyze test results and identify opportunities to improve test coverage and quality.
- Maintain and improve DFT/test methodologies and verification flows to produce production-quality deliverables.
Requirements
Must-have technical skills and experience; concise summary only.
- 5+ years hands-on DFT/DFx engineering experience (DFT verification and methodologies).
- Hands-on ATPG experience and test coverage analysis.
- Working knowledge of IEEE 1687 / IJTAG, Instrument Connectivity Language (ICL), and Procedural Description Language (PDL).
- Experience with ASIC/SoC designs and strong debugging/problem-solving skills.
- Familiarity with commercial DFT tools.
- Nice-to-have: Siemens Tessent experience and prior work on complex ASIC/SoC projects.
Education Requirements
Not specified.
About the Company
Company: Philodesign Technologies
Headquarters: San Francisco Bay Area, CA, USA
Philodesign Technologies is a semiconductor engineering company focused on ASIC/SoC design and test solutions, offering design-for-test (DFT) expertise and collaboration across RTL, verification, and test teams to improve test coverage and manufacturing quality.
