DFT Engineer Intern

Job Title

DFT Engineer Intern

Role Summary

Work on design-for-test (DFT) implementation and automation for Ambarella's AI vision processors. The role supports DFT feature development, automation of scan/compression/MBIST flows for complex multi-million-gate SoCs, and analysis of DFT verification results.

Experience Level

Entry-level — Internship. Suitable for master's students or recent graduates with relevant DFT and RTL experience.

Responsibilities

Primary responsibilities include design, automation, verification, and analysis of DFT features for SoC designs.

• Implement logic to support DFT features.
• Automate DFT flows (scan, compression, MBIST) for complex multi-million-gate SoCs.
• Verify DFT logic and analyze fault coverage.
• Perform timing analysis for DFT modes.

Requirements

Must-have technical skills and knowledge for the role.

• Knowledge of DFT fundamentals.
• Experience with logic design and static timing analysis.
• Proficiency in Verilog and at least one scripting language (Python, Perl, Tcl, etc.).
• Experience automating scan, compression, and MBIST flows.
• Familiarity with AI-assisted programming tools or workflows.

Education Requirements

M.S. in Electrical Engineering (MSEE) in Electrical or Computer Engineering is required.

About the Company

Company: Ambarella

Headquarters: Santa Clara, California, USA

Ambarella is a leader in computer vision and video processing technology, providing advanced solutions that enhance the performance of video applications. Focused on quality and innovation, Ambarella develops products for diverse uses, including autonomous vehicles, surveillance systems, and smart cameras, aiming to deliver pristine imagery and efficient compression while minimizing power consumption.