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DFT Design Engineer

Intel Corporation
June 24, 2026
Full-time
Remote friendly (Bengaluru, Karnataka, India)
Worldwide
DFT Jobs, Level - Mid-Career

Job Title

DFT Design Engineer

Role Summary

The DFT Design Engineer will develop and integrate Design-for-Test solutions for IP blocks and SoCs, focusing on SCAN, MBIST, BSCAN and test content for manufacturing. The role partners with design, verification, post-silicon and manufacturing teams to ensure testability, quality, and production readiness.

Experience Level

Mid-level. Experience guidance: 4+ years with a Bachelor's degree, 3+ years with a Master’s degree, or 0+ years with a PhD (see Education Requirements for full details).

Responsibilities

Primary responsibilities include design, integration, verification, and production-readiness of DFT features:

  • Develop RTL and structural code for DFT features such as SCAN, MBIST, and BSCAN.
  • Generate test content for manufacturing and high-volume production (HVM) on ATE.
  • Support DFT timing closure and resolve RTL test failures.
  • Integrate DFT blocks into functional IP and SoC designs and support SoC customers.
  • Collaborate on block, subsystem, and SoC DFT architecture and microarchitecture decisions.
  • Verify DFT implementations and drive corrective actions to meet architecture specifications.
  • Work with post-silicon and manufacturing teams to validate features on silicon and support debug.
  • Optimize logic for power, performance, area, timing, test coverage, and test time.
  • Document test learnings and contribute to continuous improvement of test methodologies.

Requirements

Must-have:

  • Practical knowledge of Design for Test (DFT) tools, methodologies, and techniques.
  • Proficiency in SystemVerilog and experience with OVM/UVM-based verification.
  • Experience with RTL coding and simulation for DFT features.
  • Experience generating DFx/test content and supporting DFT timing closure.
  • Ability to integrate DFT into IP/SoC and support cross-functional stakeholders.
  • Strong problem-solving and debugging skills.

Nice-to-have:

  • Experience optimizing designs for power/performance/area and test coverage goals.
  • Post-silicon debug and manufacturing/ATE experience.
  • Familiarity with SoC-level architecture and microarchitecture trade-offs.

Education Requirements

Bachelor's (BS) in Electrical Engineering, Computer Engineering, or a related field is listed. Experience guidelines in the posting: 4+ years with a Bachelor's degree, 3+ years with a Master's degree, or 0+ years with a PhD. Equivalent practical experience is indicated by the degree-to-experience mapping.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-06-24