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DFT ASIC Engineering Technical Leader - ATPG

Cisco Systems
October 13, 2026
Full-time
On-site
Bengaluru, Karnataka, India
DFT Jobs, Level - Senior

Job Title

DFT ASIC Engineering Technical Leader - ATPG

Role Summary

Lead a team of Design-for-Test (DFT) engineers within the Cisco Silicon One design center in Bengaluru to define and deliver DFT features across ASIC projects. The role focuses on technical leadership, cross-functional collaboration, and ensuring testable, manufacturable silicon from pre-silicon through production qualification.

Experience Level

Senior - 10+ years of relevant ASIC/DFT experience (posting indicates 10 to 17 years).

Responsibilities

Own technical direction and delivery of DFT across multiple projects and the full product lifecycle.

  • Lead, mentor, and develop a team of DFT engineers; provide performance feedback and career development.
  • Drive DFT activities through pre-silicon design, post-silicon debug, silicon bring-up, and production qualification.
  • Collaborate with chip architects, design, and verification teams to define and standardize DFT strategies.
  • Supervise implementation of ATPG, scan compression, memory BIST, boundary scan, and related DFT techniques.
  • Guide debugging and root-cause analysis of silicon failures to improve yield and reliability.
  • Establish and continuously improve DFT methodologies and best practices for current and future designs.
  • Represent the DFT team in cross-functional meetings and report status to stakeholders and management.

Requirements

Key technical skills and leadership abilities required; preferred items listed separately.

  • Proven hands-on experience with DFT features such as scan insertion, BIST, and boundary scan.
  • Demonstrated experience leading engineering teams, including mentoring and project planning.
  • Proficiency across the full product lifecycle from pre-silicon to silicon bring-up and production qualification.
  • Strong debugging and root-cause analysis skills for silicon failures.
  • Ability to define and implement DFT methodologies and drive adoption across projects.

Preferred:

  • Experience with Automatic Test Pattern Generation (ATPG) methodologies and scan compression techniques.
  • Prior experience leading complex technical projects and collaborating with cross-functional teams.
  • Excellent interpersonal, communication, and presentation skills.
  • System-level understanding of networking and silicon solutions; attention to detail.

Education Requirements

BTech / MTech in Electrical Engineering, Computer Engineering, or a related technical field (as listed in the posting). Years of experience (10+ years) reported separately under Experience Level.


About the Company

Company: Cisco Systems

Headquarters: San Jose, CA, United States

Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

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Date Posted: 2026-10-13