DFT Architect

Job Title

DFT Architect

Role Summary

The DFT Architect defines chip- and IP-level design-for-test (DFT) architecture — including scan, MBIST, PHY, high-speed I/Os, communication controllers and FPGA logic — and leads DFT/DFX strategy from early architecture through production. The role collaborates with SoC architects, design implementation, physical design, manufacturing/ATE, silicon debug and product quality teams to deliver manufacturable, cost- and quality-optimized test solutions.

This position sits within global quality and operations and focuses on delivering effective pre- and post-silicon test solutions for high-volume production.

Experience Level

Senior-level. Significant hands-on DFT engineering experience across pre-silicon and post-silicon cycles is expected; no specific years-of-experience stated.

Responsibilities

Primary responsibilities center on defining and delivering DFT architecture and ensuring correct implementation and production readiness.

• Define chip-level and IP-level DFT architecture and produce clear specifications (scan, scan compression, MBIST, etc.).
• Manage DFT activities across architecture, implementation, verification, and test implementation for new products.
• Coordinate with design, physical design, manufacturing and ATE teams to optimize test cost and test quality.
• Drive firmware-driven test solutions, diagnosability planning and yield improvement efforts.
• Lead and guide internal DFT teams to ensure correct implementation of DFT structures.
• Support post-silicon debug, test deployment and production test environment readiness.

Requirements

Must-have technical skills and capabilities; preferred items listed separately.

• Proven DFT engineering experience through pre- and post-silicon cycles.
• DFT implementation experience including Scan and Scan Compression at IP and SoC level; familiarity with ATPG flows (stuck-at, at-speed, path-delay).
• Strong MBIST knowledge and memory test architecture experience.
• Experience with PHY, high-speed I/Os, digital communication and functional test development.
• Practical knowledge of Verilog, synthesis flows, physical implementation and static timing analysis (STA).
• Familiarity with verification methodology and post-silicon debug using bench equipment (oscilloscope, logic analyzer).
• Effective communicator with experience working across global, cross-functional teams.
• Must be legally authorized to work in the United States; this role is not eligible for visa sponsorship.

Nice-to-have:

• Experience with Tessent Streaming Scan Network (SSN).
• Experience with FPGA logic design and synthesis.
• Embedded design and firmware methodology experience.

Education Requirements

MS or Ph.D. in Electrical, Electronic, or Computer Engineering as stated in the posting.

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.