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Design Verification Senior Engineer

Synopsys
September 06, 2026
Full-time
On-site
Hanoi, Hanoi, Vietnam
Verification Jobs, Level - Senior

Job Title

Design Verification Senior Engineer

Role Summary

Senior engineering role within the ASIC Digital Design team responsible for functional verification of digital blocks and SoCs. The engineer will work with RTL designers, verification engineers, and system teams to develop and execute verification plans and ensure design quality.

Experience Level

Senior β€” typically 7+ years of relevant industry experience in digital/ASIC design verification or equivalent.

Responsibilities

Key responsibilities typically associated with this role include:

  • Define and execute functional verification plans for digital/ASIC blocks and subsystems.
  • Develop verification environments, testbenches, and stimulus using SystemVerilog and UVM.
  • Create and run directed, constrained-random tests and maintain functional coverage metrics.
  • Debug RTL and verification failures using simulators and waveform analysis.
  • Collaborate with RTL designers to resolve functional and timing issues.
  • Integrate verification with CI flows and simulation regression infrastructure.
  • Mentor junior engineers and contribute to design reviews and verification best practices.
  • Support pre-silicon validation and silicon bring-up as required.

Requirements

Typical skills and experience expected for successful candidates. Items are indicative because the source posting did not list explicit requirements.

  • Must-have: Strong experience in design verification for ASIC/SoC projects; proficiency with SystemVerilog and UVM.
  • Hands-on experience with simulation tools, functional coverage, and debug methodologies.
  • Experience writing verification scripts and utilities in Python, Tcl, or similar scripting languages.
  • Familiarity with RTL (Verilog/VHDL) and common EDA flows for synthesis and simulation.
  • Proven ability to collaborate across RTL, architecture, and validation teams and to lead verification efforts.
  • Nice-to-have: Experience with emulation/FPGA prototyping, formal verification, low-power verification, or Synopsys toolchain.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-03