Design Verification Lead, AI Hardware

Job Title

Design Verification Lead, AI Hardware

Role Summary

Lead verification for a next-generation AI SoC: manage a verification engineering team, define verification and test strategies, and validate functionality and performance of the AI core and on‑chip network from subsystem simulation through FPGA prototypes to silicon.

Hybrid role based in Toronto, ON. Work involves close collaboration with hardware architects and software teams to meet performance and correctness targets.

Experience Level

Senior / Lead. The posting states candidates will be assessed for the appropriate level during interviews; typical hire is an experienced ASIC/SoC verification lead with multiple tape‑outs.

Responsibilities

Primary responsibilities include:

• Lead and mentor a team of verification engineers; set technical direction and quality goals.
• Define and execute coverage‑driven verification strategies for AI accelerators and SoC subsystems.
• Architect verification plans for mixed‑precision AI data types (e.g. FP8, BF16, INT8) and tensor operations.
• Design and run NoC stress and benchmarking tests to validate throughput, bandwidth, and congestion behavior.
• Implement resiliency, error‑injection, and multi‑core concurrency tests to expose edge cases.
• Develop portable test methodologies that scale from simulation to FPGA bring‑up and final silicon validation.
• Coordinate cross‑functional validation with architecture, firmware, and software teams to meet performance targets.

Requirements

Must‑have and preferred qualifications:

• Proven experience leading verification teams on ASIC/SoC projects and delivering complex tape‑outs.
• Strong hands‑on expertise with UVM and SystemVerilog; experience with cocotb or equivalent Python‑based verification frameworks.
• Deep knowledge of AI/ML hardware concepts, mixed‑precision arithmetic, and tensor compute patterns.
• Experience validating on‑chip networks (NoC) under high traffic, including benchmarking and congestion analysis.
• Skilled in creating portability from subsystem simulation to FPGA prototypes and silicon bring‑up.
• Experience with coverage‑driven verification methodologies and test automation.
• Strong leadership, technical mentorship, and cross‑team communication skills.
• Ability to design and execute error‑injection, concurrency, and multi‑core synchronization tests.
• Must be eligible to access U.S. export‑controlled technology; offers may be contingent on citizenship, permanent residency, or required export licenses.
• Nice to have: background with RISC‑V systems, high‑performance compute architectures, and performance profiling tools.

Education Requirements

Not specified.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.