Design Verification Engineers

Job Title

Design Verification Engineers

Role Summary

Join the International Design Verification team to develop and execute functional verification for high-performance processor designs. The role focuses on building verification environments, developing test plans and regressions, and debugging complex scenarios for processor/GPU/vector architectures and related subsystems.

Experience Level

Mid-level — the posting requests approximately 4 years of design verification experience.

Responsibilities

Primary responsibilities include defining and implementing verification strategies and infrastructure, executing regressions, and debugging failures.

• Design and implement verification environments and testbenches using SystemVerilog and UVM.
• Develop functional test plans, assertions (SVA/OVA), and coverage models; measure and report coverage results.
• Build and maintain regression and automation infrastructure.
• Debug complex test failures on simulation, emulation, and FPGA platforms.
• Collaborate with architects, RTL designers, and tools engineers to close verification gaps.
• Use formal equivalence checking and theorem-proving tools where appropriate.

Requirements

Must-have technical skills and experience, followed by commonly expected nice-to-haves.

• Must-have: ~4 years of design verification experience.
• Must-have: Strong SystemVerilog and UVM experience.
• Must-have: Solid understanding of verification goals, methodologies, and test-plan development.
• Must-have: Experience with Linux, git, and scripting (Perl or Python).
• Must-have: Proficiency in C and C++ for testbench/verification tasks.
• Must-have: Experience with FPGA emulation or hardware-assisted platforms and debugging.
• Must-have: Excellent communication skills and ability to work in a fast-paced startup environment.
• Nice-to-have: Experience with processor pipelines, GPUs or vector engines, cache hierarchies, MMU, and cache-coherency protocols.
• Nice-to-have: Familiarity with standard interfaces like PCIe and DDR4/5.
• Nice-to-have: Experience with regression infrastructure architecture and formal tools (e.g., Jasper) or theorem provers (e.g., ACL2).
• Nice-to-have: Experience with TCL and Expect for automation.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering or Computer Science.

About the Company

Company: Tachyum

Headquarters: Sunnyvale, CA, USA

Tachyum develops Prodigy, a universal processor that combines CPU, GPU, and TPU capabilities to deliver high-performance, energy-efficient computing for AI, HPC, and cloud data centers. The company focuses on ultra-low power, hyperscale deployments and operates offices in the United States and Slovakia.