Design Verification Engineer, Silicon

Job Title

Design Verification Engineer, Silicon

Role Summary

Work on verification of custom AR/VR silicon within Meta Reality Labs, ensuring functional correctness from specification through tape-out. The role partners with RTL design, architecture, firmware, and post-silicon teams to develop verification plans, testbenches, and infrastructure for complex digital blocks and subsystems.

Experience Level

Mid-level - typically 6+ years of experience in digital design verification.

Responsibilities

Primary responsibilities include planning and executing pre-silicon verification, maintaining verification infrastructure, and collaborating across design and validation teams.

• Develop and own verification plans for digital blocks and subsystems, covering functional coverage and corner cases.
• Design and implement constrained-random UVM testbenches for complex RTL (processors, interconnects, memory controllers, multimedia accelerators).
• Define and drive closure of functional coverage and code coverage metrics.
• Collaborate with RTL designers to review microarchitecture and identify verification risks early.
• Build and maintain simulation infrastructure, regression frameworks, and automated test suites for CI.
• Perform formal verification and property checking on critical blocks to complement simulation.
• Debug failing simulations using waveform analysis and log-based root-cause investigation.
• Partner with post-silicon validation and firmware teams to transition pre-silicon tests to hardware bring-up.
• Contribute to verification methodology, reusable VIP, and shared infrastructure improvements.
• Track and report verification progress, coverage status, and risks to program stakeholders.

Requirements

Key must-have technical skills and experience; preferred items listed separately.

• Must-have: 6+ years of experience in digital design verification, including development of UVM-based constrained-random testbenches for complex RTL blocks or subsystems.
• Must-have: Strong experience with hardware description and verification languages such as SystemVerilog and/or VHDL.
• Must-have: Demonstrated experience defining and closing functional coverage models and code coverage metrics for complex digital designs.
• Must-have: Proven RTL simulation debugging skills using waveform tools and log analysis to root-cause issues.
• Must-have: Scripting experience (Python, Perl, or similar) for test automation, regression management, or coverage analysis.
• Nice-to-have: Experience with post-silicon validation and hardware bring-up or transitioning pre-silicon content to physical hardware.
• Nice-to-have: Experience verifying mobile, wearable, or consumer SoCs and low-power verification techniques.
• Nice-to-have: Familiarity with AR/VR-relevant subsystems (computer vision, image signal processors, neural network accelerators).
• Nice-to-have: Familiarity with formal verification tools and methodologies (property checking, equivalence checking).

Education Requirements

Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field, or equivalent practical experience.

About the Company

Company: Meta Platforms

Headquarters: Menlo Park, California, United States

American technology company that develops social networking products (Facebook, Instagram, WhatsApp) and invests in virtual/augmented reality hardware and software through Reality Labs, focusing on connectivity, advertising, and immersive computing experiences.