Marvell Technology logo

Design Verification Engineer Intern - Fall 2026

Marvell Technology
June 23, 2026
Internship
On-site
Ottawa, Ontario, Canada
$32 - $43 CAD hourly
Verification Jobs, Level - Entry or Early Career

Job Title

Design Verification Engineer Intern - Fall 2026

Role Summary

Work on verification of digital blocks, subsystems and full-chip designs within Marvell's Custom Compute Solutions business unit (CCSBU). The role focuses on ensuring designs meet functional, performance, power and timing requirements for datacenter, networking, storage and security applications.

You will collaborate with architects, design, verification and physical design engineers to develop and execute verification plans, debug issues, and document verification results. This position is on-site in Ottawa.

Experience Level

Entry-level internship for students currently enrolled in a university program; no specific years of professional experience required.

Responsibilities

Primary responsibilities during the internship include:

  • Develop and execute verification tests for functional blocks and subsystems.
  • Validate block requirements for area, power, performance and latency.
  • Participate in full-chip verification activities and integration testing.
  • Work with design and physical design teams to identify and resolve design and timing issues.
  • Write clear verification plans, testbenches, and documentation of verification approaches and results.
  • Collaborate with cross-functional teams including architects, designers, verification and software engineers.

Requirements

Key qualifications and expectations for candidates.

Must-have

  • Able to work collaboratively and independently with initiative to pursue solutions.
  • Excellent written and verbal communication skills.
  • Strong analytical and problem-solving ability.
  • Some exposure to digital logic and computer architecture.
  • Full-time, on-site availability for the internship term in Ottawa.
  • Strict interview integrity: use of AI tools during interviews is not permitted and may disqualify candidates.

Nice-to-have

  • Knowledge of Verilog/SystemVerilog or other HDLs.
  • Familiarity with Ethernet, cryptographic technologies, or semiconductor ASIC design/verification methodologies and flows.

Education Requirements

Must be currently enrolled in a university program working towards a BS or MS degree in Computer Engineering, Electrical Engineering, or an equivalent technical degree.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Marvell Technology logo

Date Posted: 2026-06-17