Design Verification Engineer - Interface IP

Job Title

Design Verification Engineer - Interface IP

Role Summary

The Interface IP Design Verification (DV) Engineer will own verification for one or more external IP subsystems (e.g., PCIe, Ethernet, CPU interfaces, low-power peripherals). You will work with architects, RTL designers, integration teams, and vendors to validate functional correctness and performance across the hardware-software stack.

This is an onsite role based in San Jose (Santana Row) focused on building scalable UVM/SystemVerilog environments, driving coverage closure, and ensuring IPs integrate correctly into the SoC.

Experience Level

Mid-level — typically requires 5+ years of design verification experience.

Responsibilities

Primary responsibilities include ownership of IP verification, integration with SoC teams, and driving sign-off.

• Take end-to-end ownership of verification for one or more IP subsystems (PCIe, Ethernet, CPU interfaces, low-power peripherals, sensors).
• Develop and maintain scalable UVM/SystemVerilog verification environments and reusable testbenches.
• Validate functional correctness, performance, and compliance with IP specifications across corner cases and stress scenarios.
• Collaborate with integration and SoC DV teams to validate interactions between external IPs and the broader architecture.
• Coordinate with vendors to understand IP configurations and manage vendor integration workstreams.
• Define metrics, analyze coverage gaps, and drive coverage closure to sign-off criteria.

Requirements

Core technical skills and workplace attributes required and preferred.

Must-have:

• 5+ years of design verification experience.
• Hands-on experience with SystemVerilog and UVM and building scalable, reusable testbenches.
• Familiarity with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPU interfaces.
• Proven ability to debug complex corner-case bugs and develop creative verification strategies.
• Experience working cross-functionally with RTL designers, software, and emulation teams; strong technical communication skills.
• Ability to operate autonomously in a fast-paced startup environment and take ownership of projects.

Nice-to-have:

• Experience managing vendors and integrating third-party IP/VIP.
• Prior work on SoC integration or complex mixed-IP environments.

Education Requirements

Not specified.

Benefits

• Medical, dental, and vision coverage; $500/month credit if waiving medical benefits.
• $2,000/month housing subsidy for employees living within walking distance of the office; relocation support to San Jose.
• Wellness benefits, daily lunch and dinner in-office, and an unlimited compute budget (subject to ROI justification).

About the Company

Company: Etched

Headquarters: San Jose, CA, United States

Etched develops purpose-built AI inference ASICs and systems optimized for transformer models, aiming to deliver significantly higher performance, lower cost, and lower latency than GPUs. The company focuses on enabling applications like real-time video generation and advanced reasoning agents, and is backed by leading investors and engineers.