Design Verification Engineer (Early Career)
Marvell TechnologyJob Title
Design Verification Engineer (Early Career)
Role Summary
Member of the Connectivity Verification Group focused on PHY devices for AI, cloud datacenter and enterprise infrastructure. Work with Analog, Digital, Systems/DSP and Software teams to build verification infrastructure and verify mixed-signal designs against system requirements.
The role involves developing UVM/SystemVerilog testbenches, building test suites, collaborating with design teams to bring up new features, and using formal and coverage-driven verification techniques.
Experience Level
Entry-level / Early-career. Suitable for recent graduates or engineers with approximately 0–2 years of relevant verification or design experience.
Responsibilities
Key duties include designing and executing verification environments and tests, and collaborating with cross-functional teams.
- Develop and extend UVM/SystemVerilog-based verification environments and testbenches.
- Implement test suites and verification features using object-oriented concepts.
- Collaborate with digital and analog design teams to verify new design features and micro-architectures.
- Use formal verification methods and develop code and functional coverage metrics.
- Work with software teams to define APIs and verification automation where needed.
- Learn and apply optical PHY architectures and related system-level requirements for high-speed interfaces.
Requirements
Must-have technical skills and expectations; nice-to-have items listed separately.
- Practical experience with Verilog, VHDL, or SystemVerilog (course projects or equivalent practical experience acceptable).
- Familiarity with UVM principles and verification methodologies.
- Object-oriented programming experience (C/C++ or Java) demonstrated via coursework or projects.
- Basic understanding of electrical circuit analysis and digital signal concepts.
- Ability to collaborate across analog, digital, systems, and software teams.
- Ability to meet eligibility requirements for access to export-controlled technology (export license review may be required).
- Strong written and verbal communication skills.
Nice-to-have:
- Exposure to formal verification tools and methodologies.
- Experience or coursework in analog circuits, DSP, or high-speed PHY architectures.
- Familiarity with code and functional coverage tooling and analysis.
Education Requirements
Bachelor's degree in Electrical Engineering or a related field. Relevant college coursework includes Digital Logic Design (Verilog), Computer Architecture, Signals and Systems, basic Digital Signal Processing, and Electrical Circuit Analysis. Course projects involving object-oriented programming (C/C++/Java) and Verilog/VHDL/SystemVerilog are expected.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
