Design Verification Engineer

Job Title

Design Verification Engineer

Role Summary

The Design Verification Engineer will design, implement, and execute verification environments and tests for FPGA/ASIC IP and subsystems. The role works with architects and RTL designers to define verification strategies, run simulation regressions, debug failures, and drive coverage closure.

Experience Level

Entry-level. Expectation: approximately 2+ years of relevant ASIC or FPGA design verification experience.

Responsibilities

Key responsibilities include building verification infrastructure, creating test cases, running regressions, and collaborating with cross-functional teams to resolve issues.

• Collaborate with architects and design engineers to define verification strategies and detailed test plans.
• Develop constrained-random, reusable verification environments using SystemVerilog and UVM.
• Create and run directed and random test cases and sequences to validate functionality and find bugs.
• Implement verification components such as drivers, monitors, scoreboards, and checkers.
• Use SystemVerilog Assertions (SVA) and formal methods where applicable to validate properties.
• Execute simulation regressions, debug failures, analyze root causes, and coordinate fixes with designers.
• Define and track functional and code coverage metrics and drive coverage closure.
• Develop automation scripts and verification infrastructure to improve efficiency.
• Participate in technical reviews of specifications, design documents, and test plans.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

• Must-have: 2+ years of ASIC or FPGA design verification experience focusing on RTL-level verification.
• Must-have: Proficiency with SystemVerilog and experience developing UVM-based testbenches and verification components.
• Must-have: Experience with assertion-based verification (SVA) and coverage-driven verification methodologies.
• Must-have: Hands-on experience with simulation and debug tools and strong debugging/problem-solving skills.
• Must-have: Scripting skills for automation and data analysis (Python, Perl, or Tcl).
• Nice-to-have: Familiarity with HDLs such as Verilog or VHDL.
• Nice-to-have: Familiarity with industry protocols (AMBA/AXI/ACE/CHI/APB, PCIe, Ethernet).
• Nice-to-have: Experience with formal verification methods beyond assertions.
• Strong communication skills and ability to work in a collaborative, cross-functional team.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field; or equivalent practical experience.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.