Design Verification Engineer
CerebrasJob Title
Design Verification Engineer
Role Summary
Work on verification of advanced AI accelerator silicon by developing verification strategies, testbenches, and reusable verification infrastructure. Collaborate with architects, RTL designers, firmware, physical design, and validation teams to ensure silicon quality across simulation, emulation, and bring-up.
Position sits on the hardware verification team focused on high-performance AI chip designs. The team prioritizes thorough functional coverage, scalable test environments, and efficient regression flows.
Experience Level
Mid-level — typically requires 3+ years of hands-on design verification experience.
Responsibilities
Primary responsibilities include designing and executing verification plans, building reusable verification components, and driving debug and coverage closure.
- Define verification strategy and coverage plans from micro-architecture specifications.
- Develop and maintain UVM/SystemVerilog testbenches, stimulus, checkers, and assertions.
- Implement tests, run regressions, collect coverage, and track closure metrics.
- Debug failures across simulation, emulation, and silicon bring-up; work with cross-functional teams to resolve issues.
- Create reusable verification infrastructure and automation to improve productivity and portability.
- Contribute to verification methodology, best practices, and tooling improvements across the organization.
Requirements
Must-have technical skills and experience required for successful performance in the role.
- 3+ years of hands-on design verification experience (RTL verification).
- Deep expertise in SystemVerilog testbench development and UVM.
- Strong debugging and problem-solving skills for complex silicon issues.
- Experience with verification tools and flows: simulators, waveform viewers, coverage collection, gate-level simulation, and regression automation.
- Proficient scripting skills (Python, Perl, or similar) and solid software engineering practices, including object-oriented design.
- Ability to collaborate across architecture, RTL, physical design, firmware, and validation teams.
Nice-to-have:
- Familiarity with pipelined processor architecture.
Education Requirements
BS or MS in Computer Science or Electrical Engineering preferred (the posting lists these degrees as desired).
About the Company
Company: Cerebras
Headquarters: Sunnyvale, CA, USA
Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.
