Design Verification (DV) Engineer
The Hardware team develops high-performance FPGA and ASIC compute engines for low-latency trading. This role builds verification environments and testbenches to ensure correctness and robustness of RTL used in production systems.
You will work on RTL verification, diagnostic tooling, and continuous integration, collaborating closely with designers. The team maintains and contributes to open-source tools used in verification workflows.
Mid-level. The role expects professional RTL functional verification experience; the posting requests a minimum of 2+ years of relevant experience.
Key responsibilities include:
Must-have and preferred skills:
A bachelor’s degree in computer science, electrical engineering, or a related field (as stated in the posting).
Company: Hudson River Trading
Headquarters: New York, New York, USA
Hudson River Trading (HRT) is a leading financial technology firm that employs advanced computing solutions for algorithmic trading. Specializing in FPGA and ASIC technology, HRT focuses on creating high-performance trading systems designed to operate in real-time global markets. With a diverse team of innovators from various fields, HRT fosters a collaborative and transparent culture to drive success and promote cutting-edge developments.
