Design Staff Engineer
Marvell TechnologyJob Title
Design Staff Engineer
Role Summary
As a Digital IC Design Staff Engineer in Central Engineering, you will design high-performance AI silicon and high-speed interface IP used across Marvell products. The role covers architecture, RTL implementation, design reviews, layout, and silicon validation for ASIC IP such as PCIe, CXL, and UA link.
Work within an ~8-person digital team supporting internal and external customers; the objective is delivery of reliable, high-density, high-performance silicon IP.
Experience Level
Mid-level; the posting requests approximately 2–5 years of hands-on ASIC/digital design experience.
Responsibilities
Primary responsibilities include architecture, RTL, validation, and cross-team support:
- Define and review block and circuit architecture and develop test plans.
- Implement and debug RTL (Verilog/SystemVerilog); participate in design reviews and layout discussions.
- Perform silicon design verification and validation; troubleshoot silicon issues with validation teams and FAEs to determine root cause and provide fixes.
- Support firmware development for production firmware and coordinate with firmware teams.
- Execute static checks and closure activities (lint, CDC checks, timing closure, coverage analysis).
- Prepare and review design documentation and communicate design details to internal and external customers.
Requirements
Must-have technical skills and hands-on experience; preferred items listed separately.
- Experience analyzing and improving microarchitecture and block-level IP design.
- RTL implementation experience using Verilog and/or SystemVerilog.
- Knowledge of on-chip bus protocols such as AXI, AHB, and APB.
- Experience with linting, CDC checks, timing closure, and coverage analysis.
- Basic familiarity with UVM-based testbenches.
- Basic scripting/programming skills (Perl, Python, TCL, C/C++).
Nice-to-have:
- Experience with PCIe, NVMe, CXL, or UA link implementations.
Education Requirements
Minimum: Bachelor's degree in Electrical Engineering (BSEE). The posting specifies approximately 2–5 years of digital/ASIC design experience in addition to the BSEE.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
