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Design Implementation - Synthesis, Sr Staff Engineer

Qualcomm
August 31, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

Design Implementation - Synthesis, Sr Staff Engineer

Role Summary

Senior synthesis-focused hardware engineer responsible for synthesis flows, power-aware implementation, formal verification, and timing closure for complex ASIC/SoC designs. The role partners with RTL, verification, physical implementation, and product teams to deliver tapeout-quality implementations.

Experience Level

Senior-level role. The posting expects an experienced engineer (significant industry experience in synthesis and implementation; the description lists 13+ years of industry experience in relevant areas and also includes degree-plus-years options).

Responsibilities

Deliver synthesis and implementation solutions for digital designs and support handoff across teams.

  • Develop and maintain synthesis flows using commercial synthesis tools.
  • Implement power-aware and multi-voltage synthesis flows (UPF integration).
  • Work on timing constraints, timing closure, and debug of timing issues.
  • Support formal equivalence checking and formal flows for signoff.
  • Collaborate with RTL designers, verification, and physical implementation teams to meet project schedules and performance targets.
  • Automate flows and tool runs with scripts and build/makefile systems.
  • Drive designs from development through commercialization and tapeout readiness.

Requirements

Key technical and experience requirements. Education details are summarized separately below.

Must-have
  • Extensive industry experience in synthesis and implementation (posting specifies 13+ years in the listed areas).
  • Expertise with synthesis tools such as Synopsys Design Compiler, DCG/DC_NXT/Fusion Compiler and/or Cadence RC/Genus.
  • Experience with multi-voltage, power-aware synthesis and UPF flows.
  • Experience with formal verification tools such as Cadence LEC or Synopsys Formality.
  • Strong skills in writing and debugging timing constraints and timing closure.
  • Scripting experience (Perl and/or TCL) and familiarity with makefile-based flows.
Nice-to-have
  • RTL design or integration experience.
  • Proven track record of driving ideas from design through product commercialization.

Education Requirements

Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, Electronics, Engineering or a related technical field are listed with degree-dependent experience expectations (e.g., Bachelor's +6+ years, Master's +5+ years, PhD +4+ years). The posting also separately references substantial industry experience (13+ years) in synthesis and implementation. No specific certifications were listed. "Or equivalent work experience" is implied through the degree-plus-years options above.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-08-31