Design Engineering Architect – Systems and Interfaces
Cadence Design SystemsJob Title
Design Engineering Architect – Systems and Interfaces
Role Summary
Senior technical lead responsible for enabling integration and deployment of Cadence interface IP in customer SoCs. Collaborate with IP sales, marketing, development engineering, and customer support to define products, produce technical collateral, and lead complex pre-sales and post-sales engagements.
Experience Level
Senior - requires extensive industry experience; see Education Requirements for specific years-of-experience guidance.
Responsibilities
Primary responsibilities include technical leadership on IP integration, escalating and resolving customer issues, and producing reference materials and training.
- Serve as the technical authority for Cadence interface controllers and system-level IP integration in customer engagements.
- Lead resolution of critical customer issues and escalations; coordinate across development, sales, marketing, and support.
- Develop reference designs, application notes, and technical collateral for IP integration, SoC design, and verification.
- Create and deliver training for customers and field application engineers.
- Provide advanced technical guidance on IP integration, configuration, and system-level deployment.
- Lead product evaluations and release-readiness reviews; identify integration risks and usability gaps.
- Analyze customer use cases and propose product and documentation enhancements.
Requirements
Must-have technical skills and practical experience.
- Expertise in RTL design, verification, and debug of high-speed interface protocols such as PCIe, UCIe, and Ethernet.
- Experience integrating IP into complex SoCs; strong understanding of system architecture, interfaces, and on-chip interconnects.
- Experience with AMBA protocols (ACE, CHI, AXI, APB).
- Proficient in writing and debugging RTL (Verilog, SystemVerilog).
- Experience with end-to-end SoC implementation flows: RTL synthesis, design constraints, DFT, CDC, and static timing analysis.
- Demonstrated ability to analyze complex hardware and system problems, identify root causes, and drive cross-functional teams to resolution.
- Strong written and verbal communication skills.
- Ability to travel up to 10%, including internationally.
Education Requirements
BS in Electrical Engineering or Computer Science with 12+ years of relevant work experience, or MS in EE/CS with 8+ years of relevant work experience. The posting implies equivalent practical experience when aligned with the stated years of experience.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
