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Design Engineer (Low Power)

Qualcomm
September 04, 2026
Full-time
On-site
Santa Clara, California, United States
$176,300 - $264,500 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Design Engineer (Low Power)

Role Summary

Engineer responsible for low-power micro-architecture and SoC design for WiFi (802.11x) products within the Integrated Wireless Technology team. Deliver low-power architecture, implement power intent, perform power analysis, and own designs through RTL, verification, synthesis, timing closure, emulation and post-silicon bring-up.

Experience Level

Senior-level role. Requires extensive ASIC design experience; the posting indicates roughly 7+ years of relevant ASIC work.

Responsibilities

Key responsibilities include:

  • Translate system and architectural requirements into detailed low-power micro-architecture and design.
  • Create power intent and implement power-management features; perform power estimation and optimization.
  • Develop verification plans with the verification team and participate in design debug and silicon bring-up.
  • Own the design lifecycle: specification, RTL implementation, verification, synthesis, timing closure, emulation and post-silicon debug.
  • Perform silicon power measurements, power correlation and full-chip debug (including ARM-based debug flows).
  • Collaborate across teams on SoC micro-architecture, multi-domain clocking and bus interfaces.

Requirements

Must-have skills and experience:

  • Extensive ASIC design experience (posting indicates ~7+ years overall ASIC work).
  • Experience in SoC low-power micro-architecture, low-power design and methodology, and power optimization techniques.
  • Practical experience with Power Intent/Implementation and power analysis tools.
  • Hands-on silicon bring-up and post-silicon debug experience.
  • Familiarity with SoC micro-architecture, multi-domain clocking and AMBA protocols (AHB, APB); AXI preferred.

Nice-to-have:

  • Experience with ARM IP based full-chip debug.
  • Experience with PCIe/USB peripherals and CPU subsystem design.
  • Experience taking a low-power design from project start to volume production for at least one product cycle.

Education Requirements

Minimum Qualifications (one of the following): Bachelor's degree in Science, Engineering or related field with 6+ years ASIC design/verification/integration experience; OR Master’s degree in Science, Engineering or related field with 5+ years; OR PhD in Science, Engineering or related field with 4+ years.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-03