Design Engineer II
Implement digital designs from RTL to GDSII and optimize physical implementation flows for internal IP and external customer designs. Work on PPA characterization and optimization for performance- and power-oriented IP cores in advanced process nodes across major foundries.
Contribute to development, automation and maintenance of EDA flows and scripts for physical implementation using Cadence toolsets and scripting languages.
Mid-level. The posting specifies 2+ years of relevant industry experience.
Primary responsibilities include:
Must-have technical skills and attributes:
MS / MTech / BE / BTech in Electronics (or equivalent) from a recognized institute. The posting specifies 2+ years of experience in addition to the degree requirement.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
