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Design Engineer I (Post-Silicon Electrical Validation Engineer)

Cadence Design Systems
May 14, 2026
Full-time
On-site
San Jose, California, United States
$88,900 - $165,100 USD yearly
Test Engineering Jobs, Level - Entry or Early Career

Job Title

Design Engineer I (Post-Silicon Electrical Validation Engineer)

Role Summary

Full-time on-site role in the Cadence IP group responsible for validating the electrical performance of internal silicon test chips, debugging silicon issues, and producing high-quality characterization reports. The engineer will work closely with analog and digital design teams and other cross-functional groups to ensure silicon reliability and functionality.

Work includes electrical characterization of high-speed SERDES designs and other IP used in modern communications and compute systems.

Experience Level

Entry-level — 0–2 years of relevant work experience.

Responsibilities

Primary responsibilities include planning and executing electrical validation, debugging, and reporting:

  • Develop and execute electrical test plans and characterization procedures for silicon test chips.
  • Perform measurements and analyze analog and digital signaling, power, and timing characteristics.
  • Debug silicon issues in collaboration with analog and digital design teams and escalate findings appropriately.
  • Prepare clear characterization reports and documentation of test results and conclusions.
  • Automate test execution and data collection using scripting tools where applicable.
  • Maintain test setups, lab equipment, and test data archives.

Requirements

Must-have technical skills and attributes; education expectations are summarized separately below.

  • Strong fundamentals in analog electronics, digital electronics, negative feedback theory, and stability/control systems.
  • Strong analytical and systematic problem-solving skills.
  • Excellent written and verbal communication and ability to work collaboratively in a team environment.
  • Experience with script-based test automation (Perl, Python) — nice to have.
  • Prior experience in the semiconductor or hardware electronics industry — nice to have.
  • Familiarity with high-speed SERDES protocols and characterization techniques is a plus.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering is specified; candidates with equivalent practical experience are also considered. The role is open to applicants with 0–2 years of relevant work experience.

California annual salary range: $88,900 to $165,100; incentive compensation (bonus, equity) and benefits may also apply.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-05-14