Job Title
Design Engineer I - II or Senior Design Engineer, Texas Institute for Electronics
Role Summary
Design and develop mixed-signal circuits, test vehicles, and test structures to support 2.5D/3D heterogeneous integration (3DHI) packaging and manufacturing at the Texas Institute for Electronics (TIE). The role supports device-to-system modeling, package-aware circuit design, and production readiness for advanced semiconductor packaging.
Experience Level
Open at multiple levels: Design Engineer I (entry), Design Engineer II (mid, typically 3+ years), or Senior Design Engineer (senior, typically 10+ years). Exact level will be determined based on candidate experience.
Responsibilities
Work on design, modeling, testing, and integration of semiconductor packaging and circuits to enable reliable 2.5D/3D packaging solutions.
- Design mixed-signal circuits, test vehicles, and test structures for 2.5D/3D packaging and Assembly Design Kits (3D-ADK).
- Develop workflows, modeling methods, and standard cells to assess power, thermal, mechanical stress, signal integrity, and RF impacts of multi-chiplet systems.
- Collaborate with product, test, and process teams to define design requirements for performance, yield, reliability, and BIST support.
- Evaluate and work with EDA vendors to improve tool capabilities for package-aware design and modeling.
- Develop and apply advanced models and multi-physics simulations (power, thermal, mechanical, SI, RF, analog/digital) to predict performance and reliability.
- Automate circuit and layout generation for standard cells and structures using scripting (Python, C/C++, MATLAB, or similar).
- Design and execute experiments to validate packaging performance, reliability, and manufacturability.
- Participate in industry standardization efforts and integrate relevant practices into TIE workflows.
Requirements
Must-have skills and conditions for candidates; preferred items are noted when appropriate.
- Strong understanding of semiconductor device physics and mixed-signal circuit design.
- Proficiency with EDA tools for circuit and/or package design.
- Experience with multi-physics modeling and simulation relevant to packaging (power, thermal, mechanical stress, signal integrity, RF).
- Ability to develop automation and scripting for circuit/layout workflows (Python, C/C++, MATLAB, or similar).
- Excellent problem-solving, attention to detail, and project management across concurrent tasks.
- Effective verbal and written communication and experience collaborating with cross-functional teams.
- Authorized to work in the United States without sponsorship.
- Nice-to-have: experience in semiconductor packaging (wire bonding, flip-chip, wafer-level, fan-in/out, 3D integration), DFT/DFM and BIST techniques, and prior R&D or startup experience.
Education Requirements
Required for advertised levels: Bachelor's degree in Electrical Engineering, Semiconductor Physics, Materials Science, or a related technical field (Design Engineer I). Design Engineer II: Bachelor's plus ~3 years relevant industry experience. Senior Design Engineer: Bachelor's plus ~10 years relevant industry experience. Preferred: Master’s or Doctoral degree in semiconductor engineering fields (Electrical Engineering, Semiconductor Physics, or related). The posting allows substitution of relevant education and/or equivalent industry experience where appropriate.
About the Company
Company: The University of Texas at Austin
Headquarters: Austin, Texas, United States
A major public research university in Austin, Texas, The University of Texas at Austin offers a wide range of undergraduate and graduate programs and is known for strong engineering, research centers, and industry partnerships. It conducts extensive research, technology innovation, and workforce development across science, engineering, and other fields.

Date Posted: 2026-07-27