Design Engineer I - II or Senior Design Engineer, Texas Institute for Electronics

Job Title

Design Engineer I/II or Senior Design Engineer, Texas Institute for Electronics

Role Summary

Design and develop semiconductor circuits, test vehicles, and packaging models to support TIE’s 2.5D/3D heterogeneous integration manufacturing and the 3D-ADK. Collaborate with product, test, process teams, EDA vendors, and industry consortia to ensure performance, yield, reliability, and manufacturability.

Contribute to rebuilding advanced semiconductor 3DHI packaging and manufacturing capability in the U.S.

Experience Level

Open at multiple levels: Design Engineer I (entry-level), Design Engineer II (mid-level; typically ≥3 years relevant experience), Senior Design Engineer (senior-level; typically ≥10 years relevant experience).

Responsibilities

Key responsibilities include:

• Design mixed-signal circuits, test vehicles, and test structures for advanced packaging and chiplet systems.
• Develop 2.5D/3D modeling methods, standard cells, and workflows to assess power, thermal, mechanical, signal integrity, and RF interactions.
• Collaborate with product, test, and process teams to define requirements for performance, yield, reliability, and BIST support.
• Work with EDA vendors to evaluate tools, models, and drive improvements.
• Develop models to predict packaging effects on device performance, reliability, and lifetime (multi-physics modeling).
• Automate circuit and layout generation using scripting (Python, C/C++, MATLAB, or similar).
• Plan and execute experiments and simulations to evaluate and optimize packaging performance and manufacturability.
• Participate in industry standards and consortium activities and incorporate findings into TIE designs and workflows.

Requirements

Must-have:

• Strong understanding of semiconductor device physics and mixed-signal circuit design.
• Proficiency with EDA tools for circuit and/or package design.
• Experience with multi-physics modeling (power, thermal, mechanical, signal integrity, RF).
• Practical scripting skills for automation (Python, C/C++, MATLAB, or similar).
• Strong problem-solving, communication, and teamwork skills; ability to manage multiple projects.

Preferred:

• Experience in semiconductor packaging (wire bonding, flip-chip, wafer-level packaging, 3D integration) and power/thermal IC or interconnect optimization.
• Background in DFT/DFM and Built-In Self-Test (BIST) methodologies.
• Experience in R&D or startup environments.

Education Requirements

Bachelor's degree required (Electrical Engineering, Semiconductor Physics, Materials Science, or related). Design Engineer II typically expects a bachelor’s plus ~3 years’ relevant industry experience; Senior typically expects a bachelor’s plus ~10 years’ relevant industry experience. Preferred: Master’s or PhD in electrical engineering/semiconductor-related fields. Relevant education may be substituted by equivalent industry experience.

About the Company

Company: The University of Texas at Austin

Headquarters: Austin, Texas, United States

A major public research university in Austin, Texas, The University of Texas at Austin offers a wide range of undergraduate and graduate programs and is known for strong engineering, research centers, and industry partnerships. It conducts extensive research, technology innovation, and workforce development across science, engineering, and other fields.