Design Engineer I
Cadence Design SystemsJob Title
Design Engineer I
Role Summary
Design Engineer I will define and implement SoC-level DFT architecture and drive DFT implementation across pre-silicon and post-silicon phases for large, complex designs. The role works within a small engineering group contributing to Cadence's Palladium platform and collaborates with RTL, verification, physical design, and operations teams.
Experience Level
Entry-level (Engineer I). This role requires at least 3 years of hands-on SoC DFT experience.
Responsibilities
Primary responsibilities span DFT architecture, insertion, verification, and silicon debug for large SoCs.
- Define and implement SoC-level DFT architecture for large and complex designs.
- Develop, integrate, and support SCAN, ATPG, MBIST, BSCAN and iJTAG flows.
- Perform DFT insertion, verification, and coverage analysis at block and SoC levels.
- Drive pre-silicon DFT sign-off, including DRC closure and coverage targets.
- Support post-silicon debug, failure analysis, and yield learning.
- Collaborate with RTL, verification, physical design, and operations teams.
Requirements
Must-have technical skills and experience for immediate contribution; good-to-have skills improve effectiveness.
- Must-have: At least 3 years of hands-on SoC DFT experience.
- Must-have: Strong expertise in SCAN, ATPG, and MBIST.
- Must-have: Experience with pre-silicon validation and post-silicon debug.
- Must-have: Strong problem solving, debugging skills, and ability to work in cross-functional engineering teams.
- Nice-to-have: Scripting experience (TCL, Perl, Python) for flow automation and analysis.
- Nice-to-have: Experience with IP-level DFT integration and reuse.
- Nice-to-have: Exposure to low-power DFT considerations and complex clocking architectures.
- Nice-to-have: Familiarity with manufacturing test flows and silicon yield improvement.
Education Requirements
Bachelor's degree (BS) required. Field of study not specified in the posting.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
