Design Engineer, Coherent High Speed Interconnect
Engineer responsible for architecture and RTL implementation of NVIDIA's NVLINK-C2C high-speed coherent interconnect used in mobile SoCs and GPUs. Work spans system architecture, IP design, performance and power optimization, and cross-functional integration with partners and internal teams.
This role directly contributes to chiplet-based interconnects that enable coherent connectivity across GPUs, DPUs, and CPUs.
Mid-level (posting references senior experience but does not state explicit years). Candidates should have multiple years of RTL/interconnect design experience.
Key responsibilities include technical design, collaboration, and optimization of high-speed coherent interconnect IP.
Must-have technical skills and experience for the role; items labeled "Nice-to-have" are preferred but not required.
BS (or equivalent practical experience) in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is required. Master’s or PhD is preferred. No specific certifications were listed.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
