Design Engineer - ASIC/RTL

Job Title

Design Engineer - ASIC/RTL

Role Summary

Lead and participate in the design of advanced system-on-chip (SoC) products using industry ASIC flows and advanced digital CMOS processes. Work spans RTL design, verification, synthesis, timing closure, and coordination with physical implementation, software and silicon bring-up teams.

Position involves integration and development around multiple IP blocks such as ARM cores and common I/O subsystems.

Experience Level

Mid-level. Specific years of experience not stated; expects practical SoC/ASIC design experience.

Responsibilities

Primary responsibilities include:

• Lead and participate in RTL design and implementation for SoC projects.
• Define chip-level requirements and contribute to architecture development and modeling.
• Write micro-architectural specifications and convert them to RTL logic.
• Perform RTL verification, emulation, debug, synthesis, and timing closure.
• Integrate and validate standard IP (ARM cores, Ethernet, DDR, DMA, PCIe, SATA) and vendor/internal IP.
• Coordinate with physical design, software, and silicon bring-up teams to deliver production silicon.

Requirements

Must-have skills and experience:

• Hands-on experience with full ASIC design flow: RTL coding, debugging/verification, synthesis, and timing closure.
• Practical knowledge of SoC architecture and integration of IP blocks.
• Working knowledge of ARM cores and common I/O interfaces.
• Strong communication, documentation, organization, and time-management skills.

Nice-to-have:

• Experience with Ethernet, DDR, DMA, PCIe, SATA, or vendor-specific internal IP.
• Familiarity with emulation, silicon bring-up, and advanced digital CMOS processes.

Education Requirements

Not specified.

About the Company

Company: Infobahn Softworld

IT services and staffing firm specializing in software development and engineering recruitment, including embedded systems and ASIC/RTL design contract placements.