DDR Validation Lead, Staff (AI Accelerator Platform)

Job Title

DDR Validation Lead, Staff (AI Accelerator Platform)

Role Summary

The DDR Validation Lead will plan and execute end-to-end validation of LPDDR5X and LPDDR6 memory subsystems for AI accelerator and flagship mobile SoCs. The role spans pre-silicon through post-silicon phases and requires working across hardware, firmware, and system software teams to ensure memory functionality, performance, and production readiness.

Experience Level

Senior-level. The role expects substantial experience in DDR/memory subsystem validation or silicon bring-up (typical guidance: 5+ years in DDR/memory validation or equivalent platform validation experience).

Responsibilities

Lead validation activities and collaborate with cross-functional teams to bring memory subsystems to production quality.

• Define and execute DDR validation strategy across emulation, FPGA, and silicon platforms.
• Lead LPDDR5X/LPDDR6 bring-up, training validation, frequency scaling, low-power state validation, and feature enablement.
• Develop and run validation plans for functionality, performance, reliability, power, and corner-case scenarios.
• Debug DDR controller, PHY, firmware, SI/PI, timing, and system-level issues.
• Validate interactions between DDR and CPU, GPU, NPU, cache hierarchy, NoC, and system software.
• Characterize bandwidth, latency, QoS, memory pressure, and AI workload behavior.
• Develop scalable automation, regression infrastructure, and debug analytics frameworks.
• Partner with architecture, design, firmware, SI/PI, package, and DRAM vendors to root-cause and resolve issues.

Requirements

Must-have technical skills and experience for immediate contribution.

• 5+ years of experience in DDR/memory subsystem validation or silicon bring-up focused on LPDDR families.
• Strong understanding of LPDDR4/5/5X/6 architectures, DDR controllers, and PHYs.
• Experience with memory training, calibration algorithms, and low-power memory features.
• Knowledge of cache coherency, NoC architectures, and system-level memory interactions.
• Proven post-silicon debug skills (timing, signal integrity interactions, firmware and system debug).
• Proficiency in C/C++ and low-level software/firmware development for validation and bring-up.
• Experience building automation, regression infrastructure, and debug analytics.

Nice-to-have:

• Experience with mobile SoC, AI compute, automotive, or server platform validation.
• Familiarity with SI/PI analysis, memory performance tuning, and thermal characterization.
• Experience driving first-silicon memory bring-up and volume production qualification.

Education Requirements

Degree required: Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. The posting also specifies equivalent experience mappings (example: Bachelor's +4 years, Master's +3 years, PhD +2 years of relevant ASIC design/verification/validation/integration experience).

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.