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DDR PHY Sr Staff Design Verification Engineer

Qualcomm
August 31, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

DDR PHY Sr Staff Design Verification Engineer

Role Summary

Senior design verification engineer responsible for verification of DDR-PHY IP used in next-generation SoCs for smartphones, tablets, and laptops. The role owns the DV testbench and verification collateral, develops test plans, performs failure debug, and coordinates with design, subsystem/SoC, and post-silicon teams to achieve quality sign-off.

Experience Level

Senior (Sr. Staff). Typical expectation is 12–15 years of design verification experience for complex IPs; significant hands-on verification experience required.

Responsibilities

Primary responsibilities include ownership of verification assets, planning, execution, and cross-team debug to drive design quality.

  • Own DV testbench and associated verification collateral (checkers, scoreboards, assertions, functional coverage).
  • Develop test plans and test cases to cover design features and verify coverage closure.
  • Verify DDR-PHY features; apply knowledge of DFI protocol and JEDEC standards for current generations.
  • Collaborate with Design, Subsystem/SoC, and SVE teams on failure debug and root-cause analysis.
  • Debug regression signatures, identify fixes, and drive quality sign-off and required documentation.
  • Perform IP-level and subsystem-level verification; support post-silicon bring-up and HW-SW debug as required.
  • Interact with other teams to resolve SS/SoC/post-silicon issues and close verification gaps.
  • Familiarity with standard bus protocols (AHB, AXI) is a plus.

Requirements

Must-have technical skills and verification experience; nice-to-have items listed separately.

  • Extensive experience in functional verification and computational logic design/verification concepts.
  • Expertise in Verilog/SystemVerilog and UVM/OVM methodologies.
  • Experience with functional coverage, gate-level simulation (GLS), low-power verification, and formal verification techniques.
  • Proven ability to develop monitors, scoreboards, and sequencers to generate complex verification scenarios.
  • Strong debugging, analytical, and problem-solving skills for silicon and pre-silicon issues.
  • Experience with scripting (Perl, Tcl) is a plus.
  • Post-silicon bring-up and HW-SW debug experience is desirable.

Education Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 6+ years of hardware engineering or related experience; OR Master's degree in a related field with 5+ years of experience; OR PhD in a related field with 4+ years of experience.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-08-29