DDR Design Verification Senior Engineer

Job Title

DDR Design Verification Senior Engineer

Role Summary

Work on verification of the DDR subsystem within the Infrastructure IP team. Build verification infrastructure, integrate VIPs, develop and execute test plans, debug failures, and close functional and code coverage to ensure high-quality silicon IP delivery.

The role collaborates with cross-functional stakeholders including design, firmware, and system teams to identify issues, root-cause failures, and drive fixes.

Experience Level

Senior - typically requires 5+ years of industry experience in hardware engineering or design verification.

Responsibilities

Primary responsibilities for this role include:

• Create and maintain DV infrastructure for DDR subsystem verification.
• Integrate and validate VIPs (verification IP) into large test benches.
• Develop, execute, and maintain test plans and directed/stress/random tests.
• Write assertions, monitors, scoreboards, sequencers and sequences to validate functionality.
• Debug failures, analyze logs and waveforms, and drive root-cause analysis with design teams.
• Analyze coverage data and implement coverage closure strategies (functional and code coverage).
• Add or enable extra debug hooks and scripting to accelerate failure diagnosis.
• Collaborate with stakeholders to ensure verification quality and program milestones are met.

Requirements

Must-have technical skills and experience:

• 5+ years of hardware engineering or design verification experience (industry DV experience preferred).
• Strong SystemVerilog and UVM expertise; experience building and using UVM-based infrastructures.
• Proven debugging skills in large test benches and CI/build systems; comfortable navigating complex simulations.
• Experience with monitors, scoreboards, sequencers, sequences, and scripting to increase verification efficiency.
• Solid understanding of digital design concepts and DV methodologies/tools.
• Familiarity with LPDDR4/LPDDR5 protocols and bus protocols such as AHB/AXI/ACE/ACE-Lite.
• Ability to write clear test plans, document results, and communicate issues to cross-functional teams.

Nice-to-have:

• Previous experience with large SoC or IP verification projects and VIP development.
• Experience with coverage analysis tools and assertion-based verification flows.

Education Requirements

Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, Information Systems, or a related technical field; or equivalent practical experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.