Custom SOC IP Verification Engineer

Job Title

Custom SOC IP Verification Engineer

Role Summary

Verify fabric and interconnect IP blocks and their integration into full SoCs. The role focuses on correctness, performance, and protocol compliance of on-chip interconnects from IP bring-up through system-level validation.

Experience Level

Senior — typically requires 6+ years of ASIC verification experience with a strong emphasis on fabric, interconnect, or NoC verification at both IP and full-chip levels.

Responsibilities

Primary responsibilities focus on planning and executing verification for interconnect fabrics and SoC integrations.

• Develop and execute verification plans and UVM-based testbenches for fabric and interconnect IP and full-chip scenarios.
• Design constrained-random and directed SystemVerilog tests targeting NoC topologies, arbitration, ordering, DMA, and flow-control behaviors.
• Verify protocol compliance, ordering, coherency, and flow-control semantics for industry-standard interconnects (e.g., AXI, CHI).
• Collaborate with architecture, software/firmware, design, modeling, emulation, and post-silicon teams to achieve first-time-right verification.
• Drive verification methodology, silicon validation strategies, and integration test plans for fabric subsystems.

Requirements

Must-have technical skills and practical experience required for the role.

• 6+ years of ASIC verification experience focused on interconnect, fabric, or NoC verification at IP and chip levels.
• Strong SystemVerilog and UVM expertise.
• Hands-on experience with interconnect and bus protocols (e.g., AMBA AXI, CHI) and deep understanding of ordering, coherency, and flow-control semantics.
• Familiarity with SoC architectures, NoC topologies, and multi-initiator/multi-target interconnect designs.
• Proficiency in scripting languages such as Python, Perl, or TCL.

Nice-to-have:

• Experience with performance verification (bandwidth/latency analysis) for interconnect fabrics.
• Exposure to verification IP for bus protocols or emulation platforms (e.g., Palladium, Veloce) for full-chip validation.
• Experience verifying GPU or AI-accelerator SoC interconnects.
• Experience with formal verification or assertion-based verification (SVA) applied to fabric and protocol properties.

Education Requirements

B.S. or M.S. in Computer Engineering, Electrical Engineering, or a related field — or equivalent practical experience.

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.