Custom SOC IP Verification Engineer
NVIDIAJob Title
Custom SOC IP Verification Engineer
Role Summary
Responsible for ASIC verification of on-chip fabrics and interconnect subsystems from IP bring-up through full-chip integration. Work with architecture, design, firmware, modeling, emulation, and post-silicon teams to ensure correct, high-performance, and compliant interconnect implementations.
Experience Level
Senior level - typically requires 8+ years of ASIC verification experience focused on fabric, interconnect, or NoC verification at both IP and full-chip levels.
Responsibilities
Primary verification duties and cross-team collaboration for fabric and interconnect subsystems.
- Verify fabric and interconnect IP blocks and full-chip integration covering DMA, routing, arbitration, ordering, flow control, and protocol compliance.
- Develop and execute verification test plans for IP-level and system-level interconnect scenarios using UVM-based environments.
- Design and implement constrained-random and directed SystemVerilog testbenches for NoC topologies and multi-agent SoC integrations.
- Collaborate with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to drive first-time-right verification.
- Define and improve silicon and platform verification strategies and methodologies for interconnect subsystems.
Requirements
Core technical skills and experience required for the role.
- 8+ years of ASIC verification experience with a strong focus on fabric, interconnect, or NoC verification at IP and full-chip levels.
- Strong practical knowledge of SystemVerilog and UVM methodology.
- Hands-on experience with interconnect and bus protocols (for example AMBA AXI, CHI, or equivalent) and understanding of ordering, coherency, and flow-control semantics.
- Familiarity with SoC architectures, NoC topologies, and multi-initiator/multi-target interconnect designs.
- Proficiency in scripting languages such as Python, Perl, or TCL.
Education Requirements
B.S. or M.S. in Computer Engineering, Electrical Engineering, or a related field - or equivalent practical experience.
Nice-to-have
Additional skills that strengthen candidacy.
- Experience with performance verification and bandwidth/latency analysis for interconnect fabrics.
- Exposure to verification IP for bus protocols or to emulation platforms (for example, Palladium, Veloce) for full-chip validation.
- Experience with GPU or AI-accelerator SoC interconnect verification.
- Experience with formal verification or assertion-based verification (SVA) applied to fabric and protocol properties.
Compensation
Base salary ranges (location and level dependent): Level 4: 168,000 USD - 264,500 USD; Level 5: 196,000 USD - 310,500 USD.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
