CPU Verification Engineer (Staff/Senior Staff)

Job Title

CPU Verification Engineer (Staff/Senior Staff)

Role Summary

Drive end-to-end verification of CPU co-processor power-management firmware-driven hardware features across pre-silicon and post-silicon phases. Work closely with Firmware, RTL Design, Emulation, and Post‑Silicon teams to define verification strategy, implement SystemVerilog/UVM testbenches, and achieve functional signoff.

Experience Level

Senior-level (Staff/Senior Staff). Preferred 8–12+ years industry experience; minimums per degree: Bachelor's +3 years, Master's +2 years, PhD +1 year.

Responsibilities

Own verification strategy, implementation, and signoff for CPU co-processor power-management and related SoC subsystems.

• Architect and implement SystemVerilog/UVM testbenches, transactors, checkers, and verification infrastructure.
• Plan verification campaigns, coverage modeling, and drive coverage closure to functional signoff.
• Validate AMBA-based IPs and interconnects (timers, mailboxes, interrupts, NoC) and power-management features (DVFS, LPM, clock/power transitions, firmware sequences).
• Lead RTL simulation, emulation, waveform analysis, and complex debug/root-cause across HW, FW, and silicon teams.
• Develop reusable stimulus frameworks, automation, debug utilities, dashboards, and CI-driven regression infrastructure.
• Support platform bring-up, feature qualification, HW/FW release validation, and silicon readiness activities.
• Influence architecture and verification methodology; mentor junior engineers and lead cross-functional initiatives.

Requirements

Must-have skills and experience:

• Extensive SoC/CPU or power-management verification experience.
• Strong SystemVerilog and UVM expertise and testbench architecture skills.
• Experience developing NoC transactors, protocol checkers, and verification infrastructure.
• Deep knowledge of AMBA protocols and system-level IPs.
• Hands-on RTL simulation, emulation, waveform analysis, and coverage closure experience.
• Experience validating power-management technologies (DVFS, LPM, idle states, power sequencing, reset flows).
• Proficiency in C/C++, Python, scripting, and data-driven verification workflows.
• Strong analytical and debugging skills with the ability to lead distributed technical teams.

Nice-to-have:

• Power-aware verification and gate-level simulation experience.
• Experience building CI/CD verification workflows and regression automation.
• Proven track record delivering verification signoff for complex SoC features.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related engineering field. Minimum-qualification equivalence stated: Bachelor's +3 years relevant experience, Master's +2 years, or PhD +1 year of relevant hardware engineering experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.