CPU–SoC Mask Layout Designer — Diploma-level (Contract), Silicon Engineering Group (SiG)
Entry-level mask layout design role within Intel's Silicon Engineering Group. The position provides hands-on training and participation in the design and verification of mask layouts for next-generation SoC/CPU products.
Work is based in Penang/Kulim, Malaysia with a hybrid work model; the role involves collaboration with internal and external stakeholders to deliver verified layout blocks.
Entry-level — targeted to Diploma fresh graduates. Suitable for candidates starting their semiconductor layout career.
Key responsibilities include:
Must-have and role expectations:
Nice-to-have:
Diploma in Electrical and Electronic Engineering or a related technical field. Positions are open only to Diploma fresh graduates (no other degree level specified).
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
