CPU–SoC Mask Layout Designer (Diploma Level Contract)
Entry-level contract role on the Silicon Engineering Group (SiG) team working on mask layout for CPU/SoC designs. The position involves hands-on layout implementation and verification tasks for next-generation SoC/CPU blocks used in Intel products.
This role follows a hybrid work model with primary engineering activities performed on-site in Penang (with work split between site and off-site as needed).
Entry-level — targeted at recent diploma graduates. No prior professional experience required; training will be provided.
Primary responsibilities include physical layout implementation and verification for integrated circuits:
Expectations for candidates and useful skills.
Diploma in Electrical and Electronic Engineering or a related technical field. Positions are open only to diploma fresh graduates. The posting does not state alternative degree equivalents or certification requirements.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
